≤ T

A

≤ +85˚C except as specified) (Continued)

Symbol

Parameter

Conditions

Value

Units

Min

Typ

Max

OSCILLATOR PARAMETERS

f

OSC

Oscillator Operating

Frequency

2

110

MHz

v

OSC

Oscillator Sensitivity

OSCinRF, OSCinIF

0.5

V

Vcc

V

I

OSC

Oscillator Input Current

V

100

µA

V

−100

µA

DIGITAL INTERFACE (DATA, CLK, LE, ENIF, ENRF, Ftest/LD, FLoutRF, FLoutIF)

V

IH

High-Level Input Voltage

2.7

≤ V

Vcc

≤ 3.2

1.6

V

Vcc

≤ 5.5

2

V

V

IL

Low-Level Input Voltage

0.4

V

I

IH

High-Level Input Current

V

−1.0

1.0

µA

I

IL

Low-Level Input Current

V

−1.0

1.0

µA

V

OH

High-Level Output Voltage

I

V

V

V

OL

Low-Level Output Voltage

I

0.4

V

MICROWIRE INTERFACE TIMING

T

CS

Data to Clock Set Up Time

See Data Input Timing

50

ns

T

CH

Data to Clock Hold Time

See Data Input Timing

10

ns

T

CWH

Clock Pulse Width High

See Data Input Timing

50

ns

T

CWL

Clock Pulse Width Low

See Data Input Timing

50

ns

T

ES

Clock to Load Enable Set

Up Time

See Data Input Timing

50

ns

T

EW

Load Enable Pulse Width

See Data Input Timing

50

ns

PHASE NOISE

L

RF Synthesizer’s

Normalized Phase Noise

Contribution, Fractional

Mode (Note 4)

RF_OM = 1 (Fractional Mode)

f=3KHz

TCXO Reference Source

RF_CP=1(4mA)

V

−208

dBc/Hz

RF Synthesizer’s

Normalized Phase Noise

Contribution, Integer Mode

(Note 4)

RF_OM = 0 (Integer Mode)

f=3KHz

TCXO Reference Source

RF_CP=2(4mA)

V

−215

dBc/Hz

L

IF Synthesizer’s

Normalized Phase Noise

Contribution (Note 4)

f=3KHz

TCXO Reference Source

IF_CP = 1 (800 mA)

V

−212

dBc/Hz

Note 3: Some reference divider ratios between the minimum and maximum are not realizable. See the section on R divider programming for more details.

measured at an offset frequency, f, ina1Hz Bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough

to avoid substantial phase noise contribution from the reference source.

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