AT49LW080 datasheet(2/34 Pages) ATMEL

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AT49LW080/040

1966C–FLASH–03/02

The AT49LW080/040 supports two hardware interfaces: Firmware Hub (FWH) for in-

system operation and Address/Address Multiplexed (A/A Mux) for programming during

manufacturing. The IC (Interface Configuration) pin of the device provides the control

between the interfaces. The interface mode needs to be selected prior to power-up or

before return from reset (RST or INIT low to high transition).

An internal Command User Interface (CUI) serves as the control center between the two

device interfaces (FWH and A/A Mux) and internal operation of the nonvolatile memory.

A valid command sequence written to the CUI initiates device automation.

Specifically designed for 3V systems, the AT49LW080/040 supports read operations at

3.3V and sector erase and program operations at 3.3V and 12V VPP.The 12V VPP

option renders the fastest program performance which will increase factory throughput,

but is not recommended for standard in-system FWH operation in the platform. With the

3.3V VPP option, VCC and VPP should be tied together for a simple, low-power 3V design.

In addition to the voltage flexibility, the dedicated VPP pin gives complete data protec-

tion when VPP ≤ VPPLK. Internal VPP detection circuitry automatically configures the

device for sector erase and program operations. Note that, while current for 12V pro-

gramming will be drawn from VPP, 3.3V programming board solutions should design

such that VPP draws from the same supply as VCC, and should assume that full program-

ming current may be drawn from either pin.

Firmware Hub Interface

The Firmware Hub (FWH) interface is designed to work with the I/O Controller Hub

(ICH) during platform operation.

The FWH interface consists primarily of a five-signal communication interface used to

control the operation of the device in a system environment. The buffers for this inter-

face are PCI compliant. To ensure the effective delivery of security and manageability

features, the FWH interface is the only way to get access to the full feature set of the

device. The FWH interface is equipped to operate at 33 MHz, synchronous with the PCI

bus.

Address/Address

Multiplexed Interface

The A/A Mux interface is designed as a programming interface for OEMs to use during

motherboard manufacturing or component pre-programming.

The A/A Mux refers to the multiplexed row and column addresses in this interface. This

approach is required so that the device can be tested and programmed quickly with

automated test equipment (ATE) and PROM programmers in the OEM’s manufacturing

flow. This interface also allows the device to have an efficient programming interface

with potentially large future densities, while still fitting into a 32-pin package. Only basic

reads, programming, and erase of the nonvolatile memory sectors can be performed

through the A/A Mux interface. In this mode FWH features, security features and regis-

ters are unavailable. A row/column (R/C) pin determines which set of addresses “rows

or columns” are latched.

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