ST6280 datasheet(42/78 Pages) STMICROELECTRONICS

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ST62T80B/E80B

TIMER (Cont’d)

4.2.3 Application Notes

The user can select the presence of an on-chip

pull-up on the TIMER pin as option.

TMZ is set when the counter reaches zero; howev-

er, it may also be set by writing 00h in the TCR

The TMZ bit must be cleared by user software

when servicing the timer interrupt to avoid unde-

sired interrupts when leaving the interrupt service

routine. After reset, the 8-bit counter register is

loaded with 0FFh, while the 7-bit prescaler is load-

ed with 07Fh, and the TSCR register is cleared.

This means that the Timer is stopped (PSI=“0”)

and the timer interrupt is disabled.

If the Timer is programmed in output mode, the

DOUT bit is transferred to the TIMER pin when

TMZ is set to one (by software or due to counter

decrement). When TMZ is high, the latch is trans-

parent and DOUT is copied to the timer pin. When

TMZ goes low, DOUT is latched.

A write to the TCR register will predominate over

the 8-bit counter decrement to 00h function, i.e. if a

write and a TCR register decrement to 00h occur

simultaneously, the write will take precedence,

and the TMZ bit is not set until the 8-bit counter

reaches 00h again. The values of the TCR and the

PSC registers can be read accurately at any time.

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