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WM8281ECS/R Folha de dados(PDF) 311 Page - Cirrus Logic

Nome de Peças WM8281ECS/R
Descrição Electrónicos  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Folha de dados(HTML) 311 Page - Cirrus Logic

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WM8281
Rev 4.0
311
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0
MICB3_ENA
0
Microphone Bias 3 Enable
0 = Disabled
1 = Enabled
R715
(02CBh)
Isolation
control
0
ISOLATE_DCVD
D1
0
Always-On power domain isolate control
Set this bit to 1 to isolate the ‘Always-On’
domain from the DCVDD pin.
If DCVDD is powered externally (not from
LDO1), this bit must be set before
selecting Sleep mode (ie. before removing
the external DCVDD supply).
If DCVDD is powered from LDO1, then
there is no requirement to set this bit.
This bit is automatically reset to 0
following a Wake-up transition (from Sleep
mode).
R3104
(0C20h)
Misc Pad
Ctrl 1
15
LDO1ENA_PD
1
LDOENA Pull-Down Control
0 = Disabled
1 = Enabled
Note - when LDO1ENA_PD and
LDO1ENA_PU are both set to ‘1’, then a
‘bus keeper’ function is enabled on the
LDOENA pin.
14
LDO1ENA_PU
0
LDOENA Pull-Up Control
0 = Disabled
1 = Enabled
Note - when LDO1ENA_PD and
LDO1ENA_PU are both set to ‘1’, then a
‘bus keeper’ function is enabled on the
LDOENA pin.
Table 125 Charge Pump and LDO Control Registers
LDO2_VSEL [5:0]
LDO OUTPUT
LDO2_VSEL [5:0]
LDO OUTPUT
LDO2_VSEL [5:0]
LDO OUTPUT
00h
0.900V
10h
1.300V
20h
2.600V
01h
0.925V
11h
1.325V
21h
2.700V
02h
0.950V
12h
1.350V
22h
2.800V
03h
0.975V
13h
1.375V
23h
2.900V
04h
1.000V
14h
1.400V
24h
3.000V
05h
1.025V
15h
1.500V
25h
3.100V
06h
1.050V
16h
1.600V
26h
3.200V
07h
1.075V
17h
1.700V
27h
3.300V
08h
1.100V
18h
1.800V
28h to 3Fh
3.300V
09h
1.125V
19h
1.900V
0Ah
1.150V
1Ah
2.000V
0Bh
1.175V
1Bh
2.100V
0Ch
1.200V
1Ch
2.200V
0Dh
1.225V
1Dh
2.300V
0Eh
1.250V
1Eh
2.400V
0Fh
1.275V
1Fh
2.500V
Table 126 LDO2 Voltage Control



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