WM8281ECSSLASHR datasheet(152/392 Pages) CIRRUS

152 / 392 page

WM8281

152

Rev 4.0

AIF SIGNAL PATH ENABLE

The AIF1 interface supports up to 8 input (RX) channels and up to 8 output (TX) channels. Each of

these channels can be enabled or disabled using the register bits defined in Table 34.

The AIF2 interface supports up to 6 input (RX) channels and up to 6 output (TX) channels. Each of

these channels can be enabled or disabled using the register bits defined in Table 35.

The AIF3 interface supports up to 2 input (RX) channels and up to 2 output (TX) channels. Each of

these channels can be enabled or disabled using the register bits defined in Table 36.

The system clock, SYSCLK, must be configured and enabled before any audio path is enabled. The

ASYNCCLK may also be requ

ired, depending on the path configuration. See “Clocking and Sample

Rates

” for details of the system clocks.

The WM8281 performs automatic checks to confirm that the SYSCLK and ASYNCCLK frequencies

are high enough to support the commanded signal paths and processing functions. If an attempt is

made to enable an AIF signal path, and there are insufficient SYSCLK or ASYNCCLK cycles to

support it, then the attempt will be unsuccessful. (Note that any signal paths that are already active

will not be affected under these circumstances.)

The Underclocked Error conditions can be monitored using the GPIO and/or Interrupt functions. See

“General Purpose Input / Output” and “Interrupts” for further details.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1305

(0519h)

AIF1 Tx

Enables

AIF1TX8_ENA

AIF1 Audio Interface TX Channel 8

Enable

0 = Disabled

1 = Enabled

AIF1TX7_ENA

AIF1 Audio Interface TX Channel 7

Enable

0 = Disabled

1 = Enabled

AIF1TX6_ENA

AIF1 Audio Interface TX Channel 6

Enable

0 = Disabled

1 = Enabled

AIF1TX5_ENA

AIF1 Audio Interface TX Channel 5

Enable

0 = Disabled

1 = Enabled

AIF1TX4_ENA

AIF1 Audio Interface TX Channel 4

Enable

0 = Disabled

1 = Enabled

AIF1TX3_ENA

AIF1 Audio Interface TX Channel 3

Enable

0 = Disabled

1 = Enabled

AIF1TX2_ENA

AIF1 Audio Interface TX Channel 2

Enable

0 = Disabled

1 = Enabled

AIF1TX1_ENA

AIF1 Audio Interface TX Channel 1

Enable

0 = Disabled

1 = Enabled

R1306

(051Ah)

AIF1 Rx

Enables

AIF1RX8_ENA

AIF1 Audio Interface RX Channel 8

Enable

0 = Disabled

1 = Enabled

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