LM4560 datasheet(37/54 Pages) NSC

37 / 54 page

4.0 Functional Description (Continued)

SIN[3:0]

SIN_S

One cycle of SIN counter

4.1.7 Recording

A down sampling SRC is used for recording.

4.1.8 PCI Buffer/Sample Cache

PCI Buffer (or called Sample Cache) is a 128x32 bit SRAM which is designed to reduce consumption of PCI bus bandwidth. Each

wave channel has two double words of buffer. The playback channel uses it as a pre-fetch buffer, while the recording channel

uses it as a post-write buffer.

4.1.9 CODEC Buffer/Sample FIFO

Between the Wave Engine and the CODEC, there’s another SRAM (128x20 bit) called the CODEC Buffer (or the Sample FIFO)

which is for synchronization between wave engine and serial interface for optimization of PCI bus utilization.

This 128-word CODEC buffer is partitioned into several sections:

Section

Size

Address

Description

PLAYBACK

PCM_L Out FIFO

PCM Left Playback FIFO

PCM_R Out FIFO

PCM Right Playback FIFO

SURR_L Out FIFO

Surround Left Playback FIFO

SURR_R Out FIFO

Surround Right Playback FIFO

CENTER Out FIFO

Center Playback FIFO

LFE Out FIFO

LFE Playback FIFO

LINE1 Out FIFO

MODEM Line1 Output FIFO

LINE2 Out FIFO

MODEM Line2 Output FIFO

HSET Out FIFO

Handset Output FIFO

I2S_L Out Buffer

I2S Left Output Buffer

I2S_R Out Buffer

I2S Right Output Buffer

SPDIF_L Out Buffer

S/PDIF Left Output Buffer

SPDIF_R Out Buffer

S/PDIF Right Output Buffer

RECORDING

PCM_L In Buffer

PCM Left Recording Buffer

PCM_R In Buffer

PCM Right Recording Buffer

LINE1 In Buffer

Modem Line1 Input Buffer

LINE2 In Buffer

Modem Line2 Input Buffer

MIC In Buffer

Microphone Input Buffer

HSET In Buffer

Handset Input Buffer

REVERB_L SEND Buffer

Reverb Left Send Buffer

REVERB_R SEND Buffer

Reverb Right Send Buffer

CHORUS_L SEND Buffer

Chorus Left Send Buffer

CHORUS_R SEND Buffer

Chorus Right Send Buffer

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