MIC4930 datasheet(12/24 Pages) MICROCHIP

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MIC4930

DS20005669A-page 12

 2016 Microchip Technology Inc.

4.0

FUNCTIONAL DESCRIPTION

4.1

PVIN

The power input (PVIN) pin provides power to the

internal MOSFETs for the switch mode regulator

section of the MIC4930. The input supply operating

range is from 2.7V to 5.5V. A low-ESR ceramic

capacitor of at least 10 μF is required to bypass from

PVIN to (power) GND. See the Application Information

section for further details.

4.2

AVIN

The analog power input (AVIN) pin provides power to

the internal control and analog supply circuitry. Careful

layout

should

considered

ensure

that

high-frequency switching noise caused by PVIN is

reduced before reaching AVIN. Always place a 1 μF

minimum ceramic capacitor very close to the IC

between the AVIN and AGND pins. For additional

high-frequency switching noise attenuation, RC

filtering can be used (R = 10Ω).

4.3

A logic high signal on the enable (EN) pin activates the

output of the switch. A logic low on EN deactivates the

output and reduces the supply current to a nominal

0.01 μA. Do not leave this pin floating.

4.4

The switch (SW) pin connects directly to one side of the

inductor and provides the current path during switching

cycles. The other end of the inductor is connected to

the load and output capacitor. Due to the high speed

switching on this pin, the switch node should be routed

away from sensitive nodes whenever possible to avoid

unwanted injection of noise.

4.5

PGND

The power ground (PGND) pin is the ground return

terminal for the high current in the switching node SW.

The current loop for the PGND should be as short as

possible and kept separate from the AGND net

whenever applicable.

4.6

The power-is-good (PG) pin is an open-drain output

that indicates logic high when the output voltage is

typically above 88% of its steady-state voltage. A

pull-up resistor of 10 kΩ or greater should be

connected from PG to VOUT, or to another voltage

source less than or equal to the input voltage.

4.7

To program the output voltage, an external resistive

divider network is connected to this pin from the output

voltage to AGND, as shown in the Typical Application

Circuit, and is compared to the internal 0.625V

reference within the regulation loop. The formula in

Equation 4-1 is used to program the output voltage.

EQUATION 4-1:

The feed-forward capacitor (CF in the Typical

Application Circuit) is typically in the range of 22 pF to

39 pF. The MIC4930 features an internal ripple

injection network, whose current is injected into the FB

node and integrated by CF. Thus, the waveform at FB

is approximately a triangular ripple. The size of CF

dictates the amount of ripple amplitude at the FB node.

Smaller values of CF yield higher FB ripple amplitudes

and better stability, but also somewhat degrade line

regulation and transient response.

TABLE 4-1:

RECOMMENDED FEEDBACK

RESISTOR VALUES

VOUT

1.0V

120k

180k

1.2V

274k

294k

1.5V

316k

226k

1.8V

301k

160k

2.5V

316k

105k

3.3V

309k

71.5k

OUT

REF

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