STGAP1ASTR datasheet(25/70 Pages) STMICROELECTRONICS

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STGAP1AS

Functional description

7.1

Inputs and outputs

The device is controlled through following logic inputs:



SD: active low shutdown input



IN+: driver input



CS: active low chip select (SPI)



SDI: serial data input (SPI)



CK: serial clock (SPI)

And following logic outputs:



SDO: serial logic output (SPI)



DIAG1: diagnostic signal (open drain)

And following IO pin:



IN-/DIAG2: driver input or diagnostic open drain output.

Logic input thresholds and output ranges vary according to VDD voltage. In particular, the

device is designed to work with VDD supply voltages of 5 V or 3.3 V.

The operation of the driver IOs can be programmed through DIAG_EN bits as described in

Table 10

A deglitch filter is applied to device inputs (SD, IN+, IN-). Each input pulse, positive and

negative, shorter than the programmed tdeglitch value is neglected by internal logic.

Deglitch time can be programmed as listed in Table 30 on page 54.

When the deglitch filter is disabled (INfilter = '00') and the 2-level turn-off function is disabled

(2LTOtime = 0x0) or enabled only after a fault event (2LTO_EN = '0'), a minimum input pulse

tINmin is required to change the device output status. The minimum input pulse timing filters

out both positive and negative pulses at the IN+, IN- and SD pins.

Table 10. Inputs true table (device NOT in “safe state”)

Bit in CFG1 register

Input pins

Output pins

DIAG_EN

IN+

IN-

GON

GOFF

OFF

X(1)

1. The IN-/DIAG2 pin is used as the open drain output for diagnostic signaling (refer to Section 7.11 on page

OFF

X(1)

OFF

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