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STM8AL3138 Folha de dados(PDF) 82 Page - STMicroelectronics |
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STM8AL3138 Folha de dados(HTML) 82 Page - STMicroelectronics |
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82 / 124 page ![]() Electrical parameters STM8AL313x/4x/6x STM8AL3L4x/6x 82/124 DocID18474 Rev 7 9.3.7 I/O port pin characteristics General characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Table 41. I/O static characteristics Symbol Parameter Conditions(1) Min Typ Max Unit VIL Input low level voltage Input voltage on all pins VSS-0.3 - 0.3 x VDD V VIH Input high level voltage Input voltage on true open- drain pins (PC0 and PC1) with VDD < 2 V 0.70 x VDD - 5.2(2) Input voltage on true open- drain pins (PC0 and PC1) with VDD ≥ 2 V - 5.5(2) Input voltage on five-volt tolerant (FT) pins (PA7 and PE0) with VDD < 2 V 0.70 x VDD - 5.2(2) Input voltage on five-volt tolerant (FT) pins (PA7 and PE0) with VDD ≥ 2 V - 5.5(2) Input voltage on 3.6 V tolerant (TT) pins - 3.6(2) Input voltage on any other pin 0.70 x VDD - VDD+0.3(2) Vhys Schmitt trigger voltage hysteresis (3) I/Os - 200 - mV True open drain I/Os - 200 - Ilkg Input leakage current (4) VSS≤VIN≤VDD High sink I/Os -- 50 nA VSS≤VIN≤VDD True open drain I/Os - - 200 VSS≤VIN≤VDD PA0 with high sink LED driver capability - - 200 RPU Weak pull-up equivalent resistor(5) VIN=VSS 30(6) 45 60(6) k Ω CIO I/O pin capacitance - - 5 - pF 1. VDD = 3.0 V, TA = -40 to 125 °C unless otherwise specified. 2. If VIH maximum cannot be respected, the injection current must be limited externally to IINJ(PIN) maximum. 3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 4. The max. value may be exceeded if negative current is injected on adjacent pins. |
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