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DM9161 Folha de dados(PDF) 21 Page - List of Unclassifed Manufacturers |
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DM9161 Folha de dados(HTML) 21 Page - List of Unclassifed Manufacturers |
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21 / 47 page ![]() DM9161 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver Final 21 Version: DM9161-DS-F02 May 10,2002 8. MII Register Description ADD Name1514 13 12 11 10 9 8 7 6 5 4 3 2 1 0 00 CONTROL Reset Loop back Speed select Auto-N Enable Power Down Isolate Restart Auto-N Full Duplex Coll. Test Reserved 01 STATUS T4 Cap. TX FDX Cap. TX HDX Cap. 10 FDX Cap. 10 HDX Cap. Reserved Pream. Supr. Auto-N Compl. Remote Fault Auto-N Cap. Link Status Jabber Detect Extd Cap. 02 PHYID1 0 0 000 0 0 1 1 0 0 0 0 0 0 0 03 PHYID2 1 0 1 1 1 0 Model No. Version No. 04 Auto-Neg. Advertise Next Page FLP Rcv Ack Remote Fault Reserved FC Adv T4 Adv TX FDX Adv TX HDX Adv 10 FDX Adv 10 HDX Adv Advertised Protocol Selector Field 05 Link Part. Ability LP Next Page LP Ack LP RF Reserved LP FC LP T4 LP TX FDX LP TX HDX LP 10 FDX LP 10 HDX Link Partner Protocol Selector Field 06 Auto-Neg. Expansion Reserved Pardet Fault LP Next Pg Able Next Pg Able New Pg Rcv LP AutoN Cap. 16 Aux. Config. BP 4B5B BP SCR BP ALIGN BP_A DPOK Repeat mode TX Select Rsvd RMII Enable Force 100LNK SPDLE D_CTL COLLE D_CTL RPDCT R-EN Reset St. Mch Pream. Supr. Sleep mode Remote LoopOut 17 Aux. Conf/Stat 100 FDX 100 HDX 10 FDX 10 HDX Reserved PHY ADDR [4:0] Auto-N. Monitor Bit [3:0] 18 10T Conf/Stat Rsvd LP Enable HBE Enable SQUE Enable JAB Enable 10T Serial Reserved Polarity Reverse 21 MDINTR INTR PEND Rsvd Rsvd Rsvd FDX Mask SPD Mask Link Mask INTR Mask Rsvd Rsvd Rsvd FDX Change SPD Change Link Change Rsvd INTR Status 22 Rcv Error Counter Receive Error Counter 23 Disconnect Counter Reserved Disconnect Counter 24 Rstlh Stat 00 LH_ ISO LH_ CSTS LH_ RMII LH_ SCRAM LH_ REP LH_ T5TMOD LH_OP [2:0] LH_PHYAD [4:0} Key to Default In the register description that follows, the default column takes the form: <Reset Value>, <Access Type> / <Attribute(s)> Where: <Reset Value>: 1 Bit set to logic one 0 Bit set to logic zero X No default value (PIN#) Value latched in from pin # at reset <Access Type>: RO = Read only RW = Read/Write <Attribute (s)>: SC = Self clearing P = Value permanently set LL = Latching low LH = Latching high |
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