MP7226LP datasheet(9/16 Pages) EXAR

9 / 16 page

MP7226

Rev. 2.00

APPLICATIONS INFORMATION

Power On Reset

At power up, all inputs are reset to 0 V if WR = 1. For WR = 0,

the addressed DAC will receive input data.

Power Supply

The MP7226 can operate with either a single or dual power

supply. Improved zero-code settling error can be obtained by

using dual power supplies. The dual power supply specifica-

tions are a positive supply (VDD) range of +10.5V to +16.5V, and

a –5V supply (VSS) . The single power supply specifications are

a positive supply (VDD) range of +10.5V to +16.5V, or range of

+4.75V to 5.5V . The specified reference voltage (VREF) range

under these conditions is from +2V to VDD –4V. For those appli-

cations requiring +10V at the output (VREF = +10V), VDD must

be +14V minimum to meet data sheet limits . 8-bit performance

is guaranteed for single supply operation (VSS = 0V); however,

zero code output sink capability is improved with VSS = –5V. For

adequate DAC and Buffer operation, VREF must always be be-

low VDD by at least 3.5V.

Power Supply Decoupling

The Power Supplies used with the MP7226 should be well

regulated and filtered. Local power supply decoupling consist-

ing of a 10

µF tantalum capacitor in parallel with a 0.01µF ce-

ramic is recommended. The decoupling capacitors should be

connected between the VDD and AGND, and between VSS and

AGND if VSS = –5V.

Unipolar Output Operation

In this configuration, the reference voltage is the same polar-

ity as the output voltage. Since the reference voltage must al-

ways be positive with respect to GND, the output can only be 0 or

positive.

Table 2. shows the code relationship for the part in unipolar

operation

Table 2. Unipolar Code Table

Digital Input

Analog Output, VOUT

) VREF (255

256)

) VREF (129

256)

) VREF (128

256) +)

VREF

) VREF (127

256)

) VREF ( 1

256)

0 V

Note :1 LSB + (2*8) (VREF) + 1

256 (VREF)

Table 3. Bipolar Code Table

Digital Input

Analog Output

) VREF ( 1

128)

* VREF ( 1

128)

* VREF (127

128)

0 V

) VREF (127

128)

* VREF (128

128) + * VREF

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