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OMAP3530ECBBA Folha de dados(PDF) 53 Page - Texas Instruments

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Nome de Peças OMAP3530ECBBA
Descrição Electrónicos  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECBBA Folha de dados(HTML) 53 Page - Texas Instruments

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OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-2. Ball Characteristics (CBC Pkg.)(1) (continued)
BALL
BALL
BUFFER
PULLUP
BALL
BALL TOP
PIN NAME
RESET REL.
MODE [4]
TYPE [5]
RESET
RESET REL.
POWER [9]
HYS [10]
STRENG TH
/DOWN
IO CELL [13]
BOTTOM [1]
[2]
[3]
MODE [8]
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
M1
K1
gpmc_nwe
0
O
1
1
0
vdds
No
4
(6)
NA
LVCMOS
AC6
Y5
gpmc_nwp
0
O
L
0
0
vdds
Yes
4
(6)
PU100/
LVCMOS
PD100
gpio_62
4
IO
safe_mode
7
-
AC11
Y10
gpmc_wait0
0
I
H
H
0
vdds
Yes
4
(6)
PU100/
LVCMOS
PD100
AC8
Y8
gpmc_wait1
0
I
H
H
7
vdds
Yes
4
(6)
PU100/
LVCMOS
PD100
gpio_63
4
IO
safe_mode
7
-
B3
NA
gpmc_wait2
0
I
H
H
7
vdds
Yes
4
(6)
PU100/
LVCMOS
PD100
gpio_64
4
IO
safe_mode
7
-
C6
NA
gpmc_wait3
0
I
H
H
7
vdds
Yes
4
(6)
PU100/
LVCMOS
PD100
sys_ndmareq
1
I
1
gpio_65
4
IO
safe_mode
7
-
W19
NA
hsusb0_clk
0
I
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
PD100
gpio_120
4
IO
safe_mode
7
-
V20
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
0
PD100
uart3_tx_irtx
2
O
gpio_125
4
IO
safe_mode
7
-
Y20
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
1
PD100
uart3_rx_irrx
2
I
gpio_130
4
IO
safe_mode
7
-
V18
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
2
PD100
uart3_rts_sd
2
O
gpio_131
4
IO
safe_mode
7
-
W20
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
3
PD100
uart3_cts_rct
2
IO
x
gpio_169
4
IO
safe_mode
7
-
W17
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
4
PD100
gpio_188
4
IO
safe_mode
7
-
Y18
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
5
PD100
gpio_189
4
IO
safe_mode
7
-
Y19
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
6
PD100
gpio_190
4
IO
safe_mode
7
-
Y17
NA
hsusb0_data
0
IO
L
L
7
vdds
Yes
4
(7)
PU100/
LVCMOS
7
PD100
(7)
The capacity load range is [2 pf to 6 pF].
Copyright © 2008–2013, Texas Instruments Incorporated
TERMINAL DESCRIPTION
53
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Product Folder Links: OMAP3530 OMAP3525



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