LM4950TS datasheet(16/25 Pages) NSC

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Application Information (Continued)

DMAX-SE =(VDD)

2 / (2

π2R

L):

Single Ended

(2)

The LM4950’s dissipation is twice the value given by Equa-

tion (2) when driving two SE loads. For a 12V supply and two

Ω SE loads, the LM4950’s dissipation is 1.82W.

The LM4950’s dissipation when driving a BTL load is given

by Equation (3). For a 12V supply and a single 8

Ω BTL load,

the dissipation is 3.65W.

DMAX-MONOBTL = 4(VDD)

2 / 2

π2R

Bridge Mode (3)

The maximum power dissipation point given by Equation (3)

must not exceed the power dissipation given by Equation

(4):

DMAX’= (TJMAX -TA) /

(4)

The LM4950’s T

JMAX = 150˚C. In the TS package, the

LM4950’s

JA is 20˚C/W when the metal tab is soldered to a

copper plane of at least 16in

2. This plane can be split be-

tween the top and bottom layers of a two-sided PCB. Con-

nect the two layers together under the tab with a 5x5 array of

vias. For the TA package, use an external heatsink with a

thermal impedance that is less than 20˚C/W. At any given

ambient temperature T

A, use Equation (4) to find the maxi-

mum internal power dissipation supported by the IC packag-

ing. Rearranging Equation (4) and substituting P

DMAX for

DMAX’ results in Equation (5). This equation gives the maxi-

mum ambient temperature that still allows maximum stereo

power dissipation without violating the LM4950’s maximum

junction temperature.

A =TJMAX -PDMAX-MONOBTL

(5)

For a typical application with a 12V power supply and a BTL

Ω load, the maximum ambient temperature that allows

maximum stereo power dissipation without exceeding the

maximum junction temperature is approximately 77˚C for the

TS package.

JMAX =PDMAX-MONOBTL

JA +TA

(6)

Equation (6) gives the maximum junction temperature

JMAX. If the result violates the LM4950’s 150˚C, reduce the

maximum junction temperature by reducing the power sup-

ply voltage or increasing the load resistance. Further allow-

ance should be made for increased ambient temperatures.

The above examples assume that a device is operating

around the maximum power dissipation point. Since internal

power dissipation is a function of output power, higher am-

bient temperatures are allowed as output power or duty

cycle decreases.

If the result of Equation (3) is greater than that of Equation

(4), then decrease the supply voltage, increase the load

impedance, or reduce the ambient temperature. Further,

ensure that speakers rated at a nominal 4

Ω (SE operation)

or 8

Ω (BTL operation) do not fall below 3Ω or 6Ω, respec-

tively. If these measures are insufficient, a heat sink can be

added to reduce

JA. The heat sink can be created using

additional copper area around the package, with connec-

tions to the ground pins, supply pin and amplifier output pins.

Refer to the Typical Performance Characteristics curves

for power dissipation information at lower output power lev-

els.

POWER SUPPLY VOLTAGE LIMITS

Continuous proper operation is ensured by never exceeding

the voltage applied to any pin, with respect to ground, as

listed in the Absolute Maximum Ratings section.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. Applications that employ a voltage regulator typi-

cally use a 10µF in parallel with a 0.1µF filter capacitors to

stabilize the regulator’s output, reduce noise on the supply

line, and improve the supply’s transient response. However,

their presence does not eliminate the need for a local 1.0µF

tantalum bypass capacitance connected between the

LM4950’s supply pins and ground. Do not substitute a ce-

ramic capacitor for the tantalum. Doing so may cause oscil-

lation. Keep the length of leads and traces that connect

capacitors between the LM4950’s power supply pin and

ground as short as possible. Connecting a 10µF capacitor,

BYPASS, between the BYPASS pin and ground improves

the internal bias voltage’s stability and improves the amplifi-

er’s PSRR. The PSRR improvements increase as the by-

pass pin capacitor value increases. Too large, however,

increases turn-on time and can compromise the amplifier’s

click and pop performance. The selection of bypass capaci-

tor values, especially C

BYPASS, depends on desired PSRR

requirements, click and pop performance (as explained in

the section, SELECTING EXTERNAL COMPONENTS),

system cost, and size constraints.

MICRO-POWER SHUTDOWN

The LM4950 features an active-low micro-power shutdown

mode. When active, the LM4950’s micro-power shutdown

feature turns off the amplifier’s bias circuitry, reducing the

supply current. The low 40µA typical shutdown current is

achieved by applying a voltage to the SHUTDOWN pin that

is as near to GND as possible. A voltage that is greater than

GND may increase the shutdown current.

There are a few methods to control the micro-power shut-

down. These include using a single-pole, single-throw switch

(SPST), a microprocessor, or a microcontroller. When using

a switch, connect a 100k

Ω pull-up resistor between the

SHUTDOWN pin and V

DD and a second 100k

Ω resistor in

parallel with the SPST switch connected between the SHUT-

DOWN pin and GND. The two resistors form a voltage

divider that ensures that the voltage applied to the SHUT-

DOWN pin does not exceed V

DD/2. Select normal amplifier

operation by opening the switch. Closing the switch applies

GND to the SHUTDOWN pin, activating micro-power shut-

down. The switch and resistor guarantee that the SHUT-

DOWN pin will not float. This prevents unwanted state

changes. In a system with a microprocessor or a microcon-

troller, use a digital output to apply the active-state voltage to

the SHUTDOWN pin. Again, ensure that the microcontroller

or microprocessor logic-high signal does not exceed the

LM4950’s V

DD/2 SHUTDOWN signal limit.

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