TNETX3150 datasheet(31/113 Pages) TI1

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TNETX3150/TNETX3150A

ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH

SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

NMON interface (continued)

The NMON control field is mapped to the lower four bits of the system NMON register DIO register address

0xA2.

For 10-Mbit/s monitoring, the NMON signals are provided as shown in Table 3 (NMON register option bits:

MONRXTX = X, MONWIDE = 0).

Table 3. 10-Mbit/s NMON Signals

TERMINAL NAME

NMON MODE (UPLINK)

NMON00

MXXRXD

NMON01

MXXCRS

NMON02

MXXRCLK

NMON03

MXXTXD

NMON04

MXXTXEN

NMON05

MXXTCLK

NMON06

MXXCOL

For 100-Mbit/s monitoring, network-monitoring signals are provided for TX as shown in Table 4 (NMON register

operation bits: MONRXTX = 1, MONWIDE = 1).

Table 4. 100-Mbit/s TX NMON Signals

NORMAL OPERATION

TERMINAL DESCRIPTION

NMON MODE (UPLINK)

NMON00

MXXTXD(0)

NMON01

MXXTXD(1)

NMON02

MXXTXD(2)

NMON03

MXXTXD(3)

NMON04

MXXTXEN

NMON05

MXXTCLK

NMON06

MXXSPEED

For 100-Mbit/s monitoring, network-monitoring signals are provided for RX as shown in Table 5 (NMON register

operation bits: MONRXTX = 0, MONWIDE = 1).

Table 5. 100-Mbit/s RX NMON Signals

NORMAL OPERATION

TERMINAL DESCRIPTION

NMON MODE (UPLINK)

NMON00

MXXRXD(0)

NMON01

MXXRXD(1)

NMON02

MXXRXD(2)

NMON03

MXXRXD(3)

NMON04

MXXRXDV

NMON05

MXXRCLK

NMON06

MXXSPEED

RX signals are latched and provided after a delay of one RX clock cycle. TX signals are the same as the TX

terminals (no latching) after a delay time.

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