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UCD3138RMHR Folha de dados(PDF) 62 Page - Texas Instruments

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Nome de Peças UCD3138RMHR
Descrição Electrónicos  Highly Integrated Digital Controller for Isolated Power
PDF  78 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

UCD3138RMHR Folha de dados(HTML) 62 Page - Texas Instruments

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UCD3138
SLUSAP2F – MARCH 2012 – REVISED NOVEMBER 2013
www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (March 2012) to Revision A
Page
Added Production Data statement to footnote and removed "Product Preview" banner
................................... 6
Changes from Revision A (March 2012) to Revision B
Page
Added Feature bullets
............................................................................................................... 6
Changed "Dual Edge Modulation" to "Triangular Modulation" in Features section
......................................... 6
Changed "265 ksps" to "267 ksps" in Features section
......................................................................... 6
Clarified number of UARTs in Feature section
................................................................................... 6
Changed "FDPP" to "DDP" throughout.
........................................................................................... 7
Changed Total GPIO pin count for the UCD3138 40-pin device from "17" to "18" in the Product Selection Matrix
table.
................................................................................................................................... 8
Changed "VREG" to "BP18" in conditions statement for Electrical Characteristics table.
................................ 16
Changed EAP – EAN Error voltage digital resolution MIN values for AFE=3, AFE=2, AFE=1, AFE=0 from 0.95,
1.90, 3.72, and 7.3 respectively; to, 0.8, 1.7, 3.55, and 6.90 respectively.
................................................. 16
Changed "VREG" to "BP18" in conditions statement for Electrical Characteristics table.
................................ 17
Changed conditions for VOL and VOH specs in the Electrical Characteristics table ........................................ 17
Added TWD spec to Electrical Characteristics table
........................................................................... 17
Changed "VREG" to "BP18" in conditions statement for Electrical Characteristics table.
................................ 18
Changed "PWM" to "DPWM" in DPWM Module.
............................................................................... 29
Changed "PWMA" and "PWMB" to "DPWMA" and "DPWMB" in .
.......................................................... 34
Changed waveforms graphic for "Phase Shifted Full Bridge Example" for clarification
................................... 41
Added text to section LLC Example
.............................................................................................. 42
Changed typical conversion speed from "268 ksps" to "267 ksps" in the General Purpose ADC12 section.
.......... 52
Added package ID information for the UCD3138RGC and UCD3138RHA devices.
...................................... 54
Added bullet "AD02 has a special ESD protection mechanism that prevents the pin from pulling down the
current-share bus if power is missing from the UCD3138" to Current Sharing Control.
.................................. 56
Added sub-bullet "The power pad of the driver IC should be tied to DGND" and changed capacitor value from
"0.1 µF" to "4.7 µF" in IC Grounding and Layout Recommendations
....................................................... 58
Added "Tools and Documentation" section
..................................................................................... 59
Changed " Mechanical Data" section to "References" section
............................................................... 61
Changes from Revision B (July 2012) to Revision C
Page
Deleted "JTAG Debug Port" feature bullet
........................................................................................ 6
Deleted text string "JTAG debug" from Description section.
................................................................... 7
Deleted "JTAG" option from Product Selection Matrix.
......................................................................... 8
Added NOTE under Functional Block Diagram
.................................................................................. 9
Added text to Pin 54 description
.................................................................................................. 11
Added text to Pin 35 description
.................................................................................................. 14
Added BP18 spec to Abs Max Ratings and Recommended Operating Conditions Tables
.............................. 15
Deleted VDD spec from System Performance section of Electrical Characteristics table ................................. 17
Added footnote to Table 3-1
...................................................................................................... 19
Deleted text string reference to "JTAG port" in ARM Processor section
.................................................... 23
Added text string regarding front-end 2 in the Front End section
............................................................ 28
Changed illustration in IC Grounding and Layout Recommendations section
............................................. 58
Changed text strings in Tools and Documentation section
................................................................... 59
Added document to References list
.............................................................................................. 61
62
References
Copyright © 2012–2013, Texas Instruments Incorporated
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Product Folder Links: UCD3138



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