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CAP1293 Folha de dados(PDF) 35 Page - Microchip Technology |
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CAP1293 Folha de dados(HTML) 35 Page - Microchip Technology |
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35 / 63 page ![]() 2013-2015 Microchip Technology Inc. DS00001566B-page 35 CAP1293 Bits 1 - 0 - CYCLE_TIME[1:0] - Determines the desired sensing cycle time for channels enabled in the Active state, as shown in Table 5-21. All enabled channels are sampled at the beginning of the sensing cycle. If additional time is remaining, the device is placed into a lower power state for the remainder of the sensing cycle. APPLICATION NOTE: The programmed sensing cycle time (CYCLE_TIME[1:0]) is only maintained if the actual time to take the samples is less than the programmed cycle time. The AVG[2:0] bits will take priority, so the sensing cycle time will be extended as necessary to accommodate the number of samples to be measured. 5.10.1 CALIBRATION ACTIVATE AND STATUS REGISTER The Calibration Activate and Status Register serves a dual function: 1. It forces the selected sensor inputs to be calibrated, affecting both the analog and digital blocks (see Section 4.4, "Sensor Input Calibration"). When one or more bits are set, the device performs the calibration routine on the corresponding sensor inputs. When the analog calibration routine is finished, the CALX[9:0] bits are updated (see Section 5.28, "Sensor Input Calibration Registers"). If the analog calibration routine completed successfully for a sensor input, the corresponding bit is automatically cleared. APPLICATION NOTE: In the case above, bits can be set by host or are automatically set by the device whenever a sensor input is newly enabled (such as coming out of Deep Sleep, after power-on reset, when a bit is set in the Sensor Enable Channel Enable register (21h) and the device is in the Active state, or when a bit is set in the Standby Channel Enable Register (40h) and the device is in the Standby state). 2. It serves as an indicator of an analog calibration failure. If any of the bits could not be cleared, the ACAL_FAIL bit is set (see Section 5.2, "Status Registers"). A bit will fail to clear if a noise bit is set or if the calibration value is at the maximum or minimum value. 1 1 2.56ms TABLE 5-21: CYCLE_TIME BIT DECODE CYCLE_TIME[1:0] Programmed Sensing Cycle Time 10 00 35ms 0 1 70ms (default) 1 0 105ms 1 1 140ms TABLE 5-22: CALIBRATION ACTIVATE AND STATUS REGISTER Addr R/W Register B7 B6 B5 B4 B3 B2 B1 B0 Default 26h R/W Calibration Activate and Status -- - - - CS3_ CAL CS2_ CAL CS1_ CAL 00h TABLE 5-20: SAMP_TIME BIT DECODE (CONTINUED) SAMP_TIME[1:0] Sample Time 10 |
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