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STV0674 Folha de dados(PDF) 14 Page - STMicroelectronics |
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STV0674 Folha de dados(HTML) 14 Page - STMicroelectronics |
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14 / 35 page ![]() Detailed Specifications STV0674 14/35 Note: 1 The SDRAM interface is designed to operate with SDRAM devices which are compliant with the Intel SDRAM Specification Revision 1.7 November 1999. Speed grades 66, 100 and 133MHz are compatible. 2 Above timing assumes 20pF load per pad. Figure 4: SDRAM write timing Table 2: SDRAM timing Symbol Min Typ. Max Units Symbol Min Typ. Max Units tCK 41.67 ns tDS 20.12 ns tCH 20.11 20.83 21.55 tCK tDH 21.82 ns tCL 20.11 20.83 21.55 tCK tRCD 1tCK tAC 24.76 ns tRAS 2tCK tOH 0ns tRC 4tCK tCMS 20.27 ns tRP 2tCK tCMH 20.02 ns tRRD 2tCK tAS 20.67 ns tAH 19.79 ns DCLK Command DQM A0-9,BA A10 ACTIVE WRITE NOP PRECHARGE NOP ROW COLUMN ROW DIN M DIN M + 1 DIN M + 2 DIN M + 3 DQ tCK tRCD tRC CKE tRAS tRP tCMS tCMH tAS tAH tCL tCH tCMS tCMH tDS tDH |
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