COP688GD datasheet(14/42 Pages) NSC

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Oscillator Circuits (Continued)

TABLE 1. Crystal Oscillator Configuration, T

A = 25˚C

CKI Freq

Conditions

Ω)(MΩ)

(pF)

(MHz)

30–36

CC = 5V

30–36

CC = 5V

200

100–150

0.455

CC = 5V

TABLE 2. RC Oscillator Configuration, T

A = 25˚C

CKI Freq

Instr. Cycle

Conditions

Ω)

(pF)

(MHz)

(µs)

3.3

2.2 to 2.7

3.7 to 4.6

CC = 5V

5.6

100

1.1 to 1.3

7.4 to 9.0

CC = 5V

6.8

100

0.9 to 1.1

8.8 to 10.8

CC = 5V

Note 31: 3k

≤ R ≤ 200k

50 pF

≤ C ≤ 200 pF

CONTROL REGISTERS

CNTRL Register (Address X'00EE)

T1C3

T1C2

T1C1

T1C0

MSEL

IEDG

SL1

SL0

Bit 7

Bit 0

The Timer1 (T1) and MICROWIRE/PLUS control register

contains the following bits:

T1C3

Timer T1 mode control bit

T1C2

Timer T1 mode control bit

T1C1

Timer T1 mode control bit

T1C0

Timer T1 Start/Stop control in timer

modes 1 and 2, T1 Underflow Interrupt

Pending Flag in timer mode 3

MSEL

Selects G5 and G4 as MICROWIRE/PLUS

signals SK and SO respectively

IEDG

External interrupt edge polarity select

(0 = Rising edge, 1 = Falling edge)

SL1 & SL0

Select the MICROWIRE/PLUS clock divide

by (00 = 2, 01 = 4, 1x = 8)

PSW Register (Address X'00EF)

T1PNDA

T1ENA

EXPND

BUSY

EXEN

GIE

Bit 7

Bit 0

The PSW register contains the following select bits:

Half Carry Flag

Carry Flag

T1PNDA Timer T1 Interrupt Pending Flag (Autoreload

RA in mode 1, T1 Underflow in Mode 2, T1A

capture edge in mode 3)

T1ENA

Timer T1 Interrupt Enable for Timer Underflow

or T1A Input capture edge

EXPND

External interrupt pending

BUSY

MICROWIRE/PLUS busy shifting flag

EXEN

Enable external interrupt

GIE

Global interrupt enable (enables interrupts)

The Half-Carry flag is also affected by all the instructions that

affect the Carry flag. The SC (Set Carry) and R/C (Reset

Carry) instructions will respectively set or clear both the carry

flags. In addition to the SC and R/C instructions, ADC,

SUBC, RRC and RLC instructions affect the Carry and Half

Carry flags.

ICNTRL Register (Address X'00E8)

Reserved

LPEN

T0PND

T0EN

µWPND

µWEN

T1PNDB

T1ENB

Bit 7

Bit 0

The ICNTRL register contains the following bits:

Reserved This bit is reserved and should to zero

LPEN

L Port Interrupt Enable (Multi-Input Wakeup/

Interrupt)

T0PND

Timer T0 Interrupt pending

T0EN

Timer T0 Interrupt Enable (Bit 12 toggle)

µWPND

MICROWIRE/PLUS interrupt pending

µWEN

Enable MICROWIRE/PLUS interrupt

T1PNDB

Timer T1 Interrupt Pending Flag for T1B cap-

ture edge

T1ENB

Timer T1 Interrupt Enable for T1B Input cap-

ture edge

T2CNTRL Register (Address X'00C6)

T2C3

T2C2

T2C1

T2C0

T2PNDA

T2ENA

T2PNDB

T2ENB

Bit 7

Bit 0

The T2CNTRL control register contains the following bits:

T2C3

Timer T2 mode control bit

T2C2

Timer T2 mode control bit

T2C1

Timer T2 mode control bit

T2C0

Timer

Start/Stop

control

timer

modes 1 and 2, T2 Underflow Interrupt Pend-

ing Flag in timer mode 3

T2PNDA

Timer T2 Interrupt Pending Flag (Autoreload

RA in mode 1, T2 Underflow in mode 2, T2A

capture edge in mode 3)

T2ENA

Timer T2 Interrupt Enable for Timer Underflow

or T2A Input capture edge

T2PNDB

Timer T2 Interrupt Pending Flag for T2B cap-

ture edge

DS100076-8

DS100076-9

FIGURE 7. Crystal and R/C Oscillator Diagrams

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