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HT48R30A Folha de dados(PDF) 3 Page - Holtek Semiconductor Inc |
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HT48R30A Folha de dados(HTML) 3 Page - Holtek Semiconductor Inc |
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3 / 43 page ![]() Pin Assignment Pin Description Pin Name I/O ROM Code Option Description PA0~PA7 I/O Pull-high* Wake-up CMOS/Schmitt trigger Input Bidirectional 8-bit input/output port. Each bit can be config- ured as a wake-up input by ROM code option. Software instruc- tions determine the CMOS output or Schmitt trigger or CMOS input (depends on an options) with pull-high resistor (determined by 1-bit pull-high options). PB0/BZ PB1/BZ PB2~PB7 I/O Pull-high* PB0 or BZ PB1 or BZ Bidirectional 8-bit input/output port. Software instructions de- termine the CMOS output or Schmitt trigger input with pull-high resistor (determined by pull-high options). The PB0 and PB1 are pin-shared with the BZ and BZ, respec- tively. Once the PB0 or PB1 is selected as buzzer driving out- puts, the output signals come from an internal PFD generator (shared with timer/event counter). VSS ¾¾ Negative power supply, ground PG0/INT I/O Pull-high* Bidirectional I/O lines. Software instructions determine the CMOS output or Schmitt trigger input with pull-high resistor (determined by 1-bit pull-high options). This external interrupt input is pin-shared with PG0. The external interrupt input is activated on a high to low transition. PC0/TMR PC1~PC5 I/O Pull-high* Bidirectional I/O lines. Software instructions determine the CMOS output or Schmitt trigger input with pull-high resistor (determined by 1-bit pull-high options). The timer input are pin-shared with PC0. HT48R30A-1 Rev. 1.10 3 July 2, 2001 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PB 6 PB 7 PA 4 PA 5 PA 6 PA 7 OS C 2 / P G2 OS C 1 / P G1 VD D RE S PC 5 PC 4 PC 3 PC 2 PB 5 PB 4 PA 3 PA 2 PA 1 PA 0 PB 3 PB 2 PB 1 / BZ PB 0 / BZ VS S PG 0 / I N T PC 0 / T M R PC 1 H T 4 8R 30A - 1 2 8 S K D I P - A / S O P - A 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 H T 4 8R 30A - 1 2 4 S K D I P - A / S O P - A PB 6 PB 7 PA 4 PA 5 PA 6 PA 7 OS C 2 / P G2 OS C 1 / P G1 VD D RE S PC 2 PC 0 / T M R PB 5 PB 4 PA 3 PA 2 PA 1 PA 0 PB 3 PB 2 PB 1 / BZ PB 0 / BZ VS S P G 0 /IN T |
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