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CLC418 Folha de dados(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Nome de Peças CLC418
Descrição Electrónicos  Dual High-Speed, Low-Power Line Driver
PDF  12 Pages
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Fabricante Electrônico  NSC [National Semiconductor (TI)]
Página de início  http://www.national.com
Logo NSC - National Semiconductor (TI)

CLC418 Folha de dados(HTML) 5 Page - National Semiconductor (TI)

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CLC418 OPERATION
The CLC418 has a current-feedback (CFB) architecture
built in an advanced complementary bipolar process.
The key features of current-feedback are:
s
AC bandwidth is independent of voltage gain
s
Inherently unity-gain stability
s
Frequency response may be adjusted with
feedback resistor (Rf in Figures 1-3)
s
High slew rate
s
Low variation in performance for a wide range
of gains, signal levels and loads
s
Fast settling
Current-feedback operation can be explained with a
simple model. The voltage gain for the circuits in Figures 1
and 2 is approximately:
where:
s
Av is the DC voltage gain
s
Rf is the feedback resistor
s
Z(j
ω) is the CLC418’s open-loop
transimpedance gain
s
is the loop gain
The denominator of the equation above is approximately
1
at
low
frequencies.
Near
the
-3dB
corner
frequency, the interaction between Rf and Z(jω)
dominates the circuit performance. Increasing Rf does
the following:
s
Decreases loop gain
s
Decreases bandwidth
s
Reduces gain peaking
s
Lowers pulse response overshoot
s
Affects frequency response phase linearity
CLC418 DESIGN INFORMATION
Standard op amp circuits work with CFB op amps. There
are 3 unique design considerations for CFB:
s
The feedback resistor (Rf in Figures 1-3) sets
AC performance
s
Rf cannot be replaced with a short or a capacitor
s
The output offset voltage is not reduced by
balancing input resistances
The following sub-sections cover:
s
Design parameters, formulas and techniques
s
Interfaces
s
Application circuits
s
Layout techniques
s
SPICE model information
DC Gain (non-inverting)
The non-inverting DC voltage gain for the configuration
shown in Figure 1 is:
Figure 1: Non-Inverting Gain
The normalized gain plots in the
Typical Performance
Characteristics section show different feedback
resistors (Rf) for different gains. These values of Rf are
recommended for obtaining the highest bandwidth with
minimal peaking. The resistor Rt provides DC bias for
the non-inverting input.
For Av < 6, use linear interpolation on the nearest Av
values to calculate the recommended value of Rf. For Av
≥ 6, the minimum recommended R
f is 200Ω.
Select Rg to set the DC gain:
DC gain accuracy is usually limited by the tolerance of Rf
and Rg.
DC Gain (unity gain buffer)
The recommended Rf for unity gain buffers is 3kΩ. Rg is
left open.
Parasitic capacitance at the inverting node
may require a slight increase of Rf to maintain a flat
frequency response.
DC Gain (inverting)
The inverting DC voltage gain for the configuration
shown in Figure 2 is:
The normalized gain plots in the
Typical Performance
Characteristics
section
show
different
feedback
resistors (Rf) for different gains. These values of Rf are
recommended for obtaining the highest bandwidth with
minimal peaking. The resistor Rt provides DC bias for
the non-inverting input.
For |Av| < 6, use linear interpolation on the nearest Av
values to calculate the recommended value of Rf. For
|Av| ≥ 6, the minimum recommended Rf is 200Ω.
+
-
1/2
CLC418
418 Fig1
Rf
0.1
µF
6.8
µF
Vo
Vin
VCC
0.1
µF
6.8
µF
VEE
3(5)
2(6)
4
8
1(7)
+
+
Rg
Rt
V
V
A
1
R
Z j
o
in
v
f
=
+ ( )ω
Z j
Rf
ω
( )
A
1
R
R
v
f
g
= +
R
R
A
1
g
f
v
=
A
R
R
v
f
g
= −



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