MB9DF564LLE datasheet(43/109 Pages) SPANSION

43 / 109 page

D at aS he e t

MB9D560_DS708-00001-3v0-E, May 15, 2015

CONFIDENTIAL

Power Supply Pins

The device is designed to ensure that if the device contains multiple VCC5, VCC12 and VSS pins, the pins

that should be at the same potential are interconnected to prevent latch-up or other malfunctions.

Further, connect these pins to an external power supply or ground to reduce unwanted radiation, prevent

strobe signals from malfunctioning due to a raised ground level, and fulfill the total output current standard,

etc. As shown below, all VSS power supply pins must be treated in the similar way. If multiple VCC5 or

VCC12 or VSS systems are connected, the device cannot operate correctly even within the guaranteed

operating range.

Power Supply Input Pin

The power supply pins should be connected to VCC5, VCC12 and VSS of this device at the low impedance

from the power supply source.

In the area close to this device, a ceramic capacitor having the capacitance larger than the capacitor of C pin

is recommended to use as a bypass capacitor between VCC5, VCC12 and VSS pins

Crystal Oscillation Circuit

An external noise to the X0 or X1 pin may cause a device malfunction. The printed circuit board must be

designed to lay out X0 and X1 pins, crystal oscillator (or ceramic resonator), and the bypass capacitor to be

grounded to the close position to the device.

The printed circuit board artwork is recommended to surround the X0 and X1 pins by ground circuits.

Mode Pin (MD1, MD0)

Connect the MD1, MD0 mode pin to the VCC5 or VSS pin directly. To prevent an erroneous selection of test

mode caused by the noise, reduce the pattern length between each mode pin and VCC5 or VSS pin on the

printed circuit board. Also, use the low-impedance pin connection.

Notes during PLL Clock Operation

When the PLL clock is selected and if the oscillator is disconnected or if the input is stopped, this clock may

continue to operate at the free running frequency of the self oscillator circuit built in the PLL. This operation

is not guaranteed.

VCC12

VSS

VCC5

VSS

VCC5

VCC12

VSS

VCC

VDD

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