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ADC08231CIWM Folha de dados(PDF) 10 Page - National Semiconductor (TI) |
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ADC08231CIWM Folha de dados(HTML) 10 Page - National Semiconductor (TI) |
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10 / 24 page ![]() Timing Diagrams (Continued) ADC08231 Timing TLH11015 – 13 LSB first output not available on ADC08231 LSB information is maintained for remainder of clock periods until CS goes high To reset the ADC08231 CLK and CS must be simultaneusly high for a period of tSELECT or greater The ADC08231 also has one extra clock period for sampling the analog signal (tca) Otherwise it is compatible with the ADC0831 ADC08234 Timing TLH11015 – 14 To reset the ADC08234 CLK and CS must be simultaneously high for a period of tSELECT or greater The ADC08234 also has one extra clock period for sampling the analog signal (tca) Otherwise it is compatible with the ADC0834 10 |
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