54F253DM datasheet(2/8 Pages) NSC

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54F74F

Pin Names

Description

Input IIH IIL

HIGHLOW

Output IOH IOL

I0a–I3a

Side A Data Inputs

1010

20 mA b06 mA

I0b–I3b

Side B Data Inputs

1010

20 mA b06 mA

S0–S1

Common Select Inputs

1010

20 mA b06 mA

OEa

Side A Output Enable Input (Active LOW)

1010

20 mA b06 mA

OEb

Side B Output Enable Input (Active LOW)

1010

20 mA b06 mA

Za Zb

TRI-STATE Outputs

15040(333)

3 mA24 mA (20 mA)

Functional Description

This device contains two identical 4-input multiplexers with

TRI-STATE outputs They select two bits from four sources

selected by common Select inputs (S0 S1) The 4-input mul-

tiplexers have individual Output Enable (OEa OEb) inputs

which when HIGH force the outputs to a high impedance

(High Z) state This device is the logic implementation of a

2-pole 4-position switch where the position of the switch is

determined by the logic levels supplied to the two select

inputs The logic equations for the outputs are shown below

Za e OEa (I0a S1 S0 a I1a S1 S0 a

I2a S1 S0 a I3a S1 S0)

Zb e OEb (I0b S1 S0 a I1b S1 S0 a

I2b S1 S0 a I3b S1 S0)

If the outputs of TRI-STATE devices are tied together all

but one device must be in the high impedance state to avoid

high currents that would exceed the maximum ratings De-

signers should ensure that Output Enable signals to TRI-

STATE devices whose outputs are tied together are de-

signed so that there is no overlap

Truth Table

Select

Data Inputs

Output

Inputs

Enable

XXXX

XXX

XLX

XHX

XLX

XHX

XXX

Address inputs S0 and S1 are common to both sections

H e HIGH Voltage Level

L e LOW Voltage Level

X e Immaterial

Z e High Impedance

Logic Diagram

TLF9505 – 4

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

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