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A6986 Folha de dados(PDF) 20 Page - STMicroelectronics |
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A6986 Folha de dados(HTML) 20 Page - STMicroelectronics |
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20 / 67 page ![]() Functional description A6986 20/67 DocID026211 Rev 6 RUP and RDWN are selected to guarantee: Equation 9 The time to ramp the internal voltage reference can be calculated from Equation 10: Equation 10 that is the equivalent soft-start time to ramp the output voltage. Figure 8 shows the soft-start phase with the following component selection: RUP = 180 k, RDWN = 33 k, CSS = 200 nF, the 1N4148 is a small signal diode and VSTEP = 13 V. Figure 8. External soft-start network VSTEP driven The circuit in Figure 7 introduces a time delay between VSTEP and the switching activity that can be calculated as: Equation 11 VSS_FINAL 2 V VSS_END TSS CSS RSS_EQ VSS_FINAL VSS START – VSS_FINAL VSS END – ----------------------------------------------------------- ln = TSS DELAY CSS RSS_EQ VSS_FINAL VSS_FINAL VSS START – ----------------------------------------------------------- ln = |
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