PDSP16488GCPR datasheet(10/33 Pages) MITEL

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4 CLOCK

DELAY

LINE

DELAYS

WIDTH = S

4 CLOCK

DELAYS

ZERO

REG B3 = 1

DELAY = 0, DEFINED BY REG D3:2 = 00

REG D0 = 0

4 CLOCK

DELAY

LINE

DELAYS

WIDTH = S

4 CLOCK

DELAYS

REG B3 = 0

D = 4 S(N 1) DEFINED BY REG D3:2

REG D0 = 0

4 CLOCK

DELAY

LINE

DELAYS

WIDTH = S

DELAYS

4 CLOCK

DELAY

LINE

DELAYS

0/4

DELAYS

WIDTH = S

DELAYS

REG D0 = 0 IF S = 4,

OR REG D0 = 1 IF S = 8

Nth PDSP16488A IN THE ROW

4 CLOCK

DELAY

LINE

DELAYS

0/4

DELAYS

WIDTH = S

DELAYS

Nth PDSP16488A IN THE ROW

4 CLOCK

DELAY

LINE

DELAYS

0/4

DELAYS

WIDTH = S

DELAYS

REG B3 = 1

D = 4 S(N 1) DEFINED BY REG D3:2

Nth PDSP16488A IN THE ROW

INPUT

OUTPUT

PDSP16488A

REG B3 = 1

DELAY = 0, DEFINED BY REG D3:2 = 00

REG D0 = 0 IF S = 4,

OR REG D0 = 1 IF S = 8

REG B3 = 1

D = 4 S(N 1) DEFINED BY REG D3:2

REG D0 = 0 IF S = 4,

OR REG D0 = 1 IF S = 8

REG B3 = 0

D = 4 S(N 1) DEFINED BY REG D3:2

REG D0 = 0

Fig. 7 Multi-device delay paths

Delay Compensation for Large Windows

A large window is composed of several partial windows each of

which is implemented in an individual device. If necessary the partial

window must be padded with zero coefficients to become one of the

standard sizes. When constructing a large window it is necessary to

delay the expansion data inputs in order to compensate for growth

in the horizontal direction. Delays in the partial sums are also

necessary to compensate for the total pipeline delay needed to

produce the previous complete horizontal stripe.

Within each device in a horizontal stripe, apart from the first,

the expansion input must be delayed by the width of the partial

window, before it is added to the internal sum. Since partial

windows can only be 4 or 8 pixels wide, a delay of 4 or 8 pixel

clocks is needed. There is, however, an in-built delay of 4 pixels

in the inter device connection, and the PDSP16488A thus only

needs an option to delay the expansion input by an additional four

pixels.

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