NCP51510 datasheet(5/7 Pages) ONSEMI

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NCP51510, NCV51510

www.onsemi.com

General*

The NCP51510 is a source/sink tracking termination

regulator specifically designed for low input voltage and

low external component count systems where space is a key

application parameter. The NCP51510 integrates a

high−performance, low−dropout (LDO) linear regulator

that is capable of both sourcing and sinking current. The

LDO regulator employs a fast feedback loop so that small

ceramic capacitors can be used to support the fast load

transient response. To achieve tight regulation with

minimum effect of trace resistance, a remote sensing input

(VTTS) should be connected to the positive terminal of the

output capacitors as a separate trace from the high current

path of the VTT output.

Generation of Internal Voltage Reference

The VTT output voltage is regulated to (and tracks with)

the voltage on the VRI Reference input. When the VRI input

is configured for standard DDR termination applications,

the VRI Reference input can be set by an external equivalent

ratio voltage divider connected to the memory supply bus

(VDDQ). The NCP51510 supports VTT voltages from 0.5 V

to 1.5 V.

Generation of Internal Voltage Reference (cont)

When the VRO output is configured for DDR termination

applications, it provides a separate VTT output reference

voltage for the memory application. The VRO Reference

utput pin is a buffered version of the VRI Reference Input,

and is capable of sourcing and sinking a load of

±5 mA. The

VRO output becomes active when the VRI input > 0.45 V

and the VCC power rail is above the UVLO threshold. The

VRO Reference Output is independent of the SS pin

(Suspend Shutdown) state.

Fault Detection and Shutdown Function

When the SS “Suspend Shutdown” input pin is driven

high, the NCP51510 regulator begins normal operation,

with the Soft Start circuit gradually increasing output

current during the first 200

ms in order to reduce the input

surge currents at startup, with full current available after the

200

ms Soft−Start circuitry has timed out.

When the SS input is driven low, the VTT output is

discharged to PGND through an internal 8 W MOSFET. The

VRO output remains on when the SS input is driven low. The

NCP51510 provides an open−drain PGOOD “Power Good”

output that goes high when the VTTS Sense input is within

±150 mV of the VRI Reference Input. The PGOOD output

de−asserts within 10

ms after the VTTS Sense input exceeds

the size of the PGOOD window. During initial VTT startup,

PGOOD asserts high 2 ms after the VTTS Sense input enters

PGOOD window. Because the PGOOD output is open−drain,

an external pull−up resistor is required (100 k

W*) between

PGOOD and a stable active supply voltage rail.

Thermal Shutdown with Hysteresis

If the NCP51510 is to operate in elevated temperatures for

long durations, care should be taken to ensure that the

maximum operating junction temperature is not exceeded.

To guarantee safe operation, the NCP51510 provides

on−chip thermal shutdown protection. When the chip

junction temperature exceeds 165

°C*, the part will

shutdown. When the junction temperature falls back, to

150

°C*, the device resumes normal operation. If the

junction temperature exceeds the thermal shutdown

threshold, the VTT output is shut off, discharged by the 8 W

internal discharge MOSFET.

Output Capacitor

Output stability is guaranteed for VTT output capacitance

COUT from 10 mF to 220 mF. The ESR of COUT between

2 m

W and 50 mW is required to maintain stability. Use the

formula below to calculate the application’s transient

response:

TT(pp)

ESR

+ DV

TT(pp)

Where:

DITT(pp) is the maximum peak−to−peak load current delta

and

DVTT(pp) is the allowable peak−to−peak voltage

tolerance.

*Typical values are used with the application description text. Please refer to the Electrical Specifications Table for a more detailed list of MIN,

MAX and TYPICAL values.

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