LM20133MHXSLASHNOPB datasheet(17/29 Pages) TI

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RC1 =

CC1

COUT

IOUT

VOUT

15 x D

VIN

-1

1-D

fSW x L

COMP

CC1

RC1

CC2

LM20133

(optional)

fSW/2

0 dB

FREQUENCY (Hz)

Error Amp Zero, fZ(EA)

Complex Double Pole, fP(MOD)

Optional Error Amp

Pole, fP2(EA)

0 dB

AEA + AM

AEA

Error Amp Pole, fP1(EA)

Complex Double Pole, fP(MOD)

Output Filter Zero, fZ(FIL)

Output Filter Pole, fP(FIL)

Error Amp Pole, fP(EA)

LM20133, LM20133Q

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SNVS526F – OCTOBER 2007 – REVISED MARCH 2013

Figure 32. LM20133 Loop Compensation

The power stage transfer function is dictated by the modulator, output LC filter, and load; while the feedback

transfer function is set by the feedback resistor ratio, error amp gain, and external compensation network.

To achieve a -20dB/decade slope, the error amplifier zero, located at fZ(EA), should positioned to cancel the

output filter pole (fP(FIL)). An additional error amp pole, located at fP2(EA), can be added to cancel the output filter

zero at fZ(FIL). Cancellation of the output filter zero is recommended if larger value, non-ceramic output capacitors

are used.

Compensation of the LM20133 is achieved by adding an RC network as shown in Figure 33 below.

Figure 33. Compensation Network for LM20133

A good starting value for CC1 for most applictions is 4.7 nF. Once the value of CC1 is chosen the value of RC

should be calculated using the equation below to cancel the output filter pole (fP(FIL)) as shown in Figure 32.

(8)

A higher crossover frequency can be obtained, usually at the expense of phase margin, by lowering the value of

CC1 and recalculating the value of RC1. Likewise, increasing CC1 and recalculating RC1 will provide additional

phase margin at a lower crossover frequency. As with any attempt to compensate the LM20133 the stability of

the system should be verified for desired transient droop and settling time.

If the output filter zero, fZ(FIL) approaches the crossover frequency (FC), an additional capacitor (CC2) should be

placed at the COMP pin to ground. This capacitor adds a pole to cancel the output filter zero assuring the

crossover frequency will occur before the double pole at fSW/2 degrades the phase margin. The output filter zero

is set by the output capacitor value and ESR as shown in the equation below.

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