PIC16C72-02SLASHSO datasheet(10/124 Pages) MICROCHIP

10 / 124 page

PIC16C72 Series

DS39016A-page 10

Preliminary

2.2.2.2

OPTION_REG REGISTER

The OPTION_REG register is a readable and writable

the TMR0 prescaler/WDT postscaler (single assign-

able register known also as the prescaler), the External

INT Interrupt, TMR0, and the weak pull-ups on PORTB.

FIGURE 2-4:

OPTION_REG REGISTER (ADDRESS 81h)

Note:

To achieve a 1:1 prescaler assignment for

the TMR0 register, assign the prescaler to

the Watchdog Timer.

R/W-1

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

= Readable bit

W = Writable bit

= Unimplemented bit,

read as ‘0’

- n = Value at POR reset

bit7

bit0

bit 7:

RBPU: PORTB Pull-up Enable bit

1 = PORTB pull-ups are disabled

0 = PORTB pull-ups are enabled by individual port latch values

bit 6:

INTEDG: Interrupt Edge Select bit

1 = Interrupt on rising edge of RB0/INT pin

0 = Interrupt on falling edge of RB0/INT pin

bit 5:

T0CS: TMR0 Clock Source Select bit

1 = Transition on RA4/T0CKI pin

0 = Internal instruction cycle clock (CLKOUT)

bit 4:

T0SE: TMR0 Source Edge Select bit

1 = Increment on high-to-low transition on RA4/T0CKI pin

0 = Increment on low-to-high transition on RA4/T0CKI pin

bit 3:

PSA: Prescaler Assignment bit

1 = Prescaler is assigned to the WDT

0 = Prescaler is assigned to the Timer0 module

bit 2-0: PS2:PS0: Prescaler Rate Select bits

000

001

010

011

100

101

110

111

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

Bit Value

TMR0 Rate

WDT Rate

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