MIC7122

Micrel

MIC7122

6

March 1999

Application Information

Input Common-Mode Voltage

The MIC7122 tolerates input overdrive by at least 300mV

beyond either rail without producing phase inversion.

If the absolute maximum input voltage is exceeded, the input

current should be limited to

±5mA maximum to prevent

reducing reliability. A 10k

Ω series input resistor, used as a

current limiter, will protect the input structure from voltages as

large as 50V above the supply or below ground. See Figure

1.

10k

Ω

Figure 1. Input Current-Limit Protection

Output Voltage Swing

Sink and source output resistances of the MIC7122 are

equal. Maximum output voltage swing is determined by the

load and the approximate output resistance. The output

resistance is:

R

V

I

OUT

DROP

LOAD

=

V

stage. V

(output swing) portion of the appropriate Electrical Character-

istics table. I

minus V+/2 and divided by R

Electrical Characteristics DC (5V) table, the typical output

high voltage drops 13mV using a 2k

Ω load (connected to V+/

2), which produces an I

Because of output stage symmetry, the corresponding typical

output low voltage (13mV) also equals V

Power Dissipation

The MIC7122 output drive capability requires considering

power dissipation. If the load impedance is low, it is possible

to damage the device by exceeding the 125

°C junction

temperature rating.

On-chip power consists of two components: supply power

and output stage power. Supply power (P

the supply voltage (V

Output stage power (P

voltage drop (V

Total on-chip power dissipation is:

P

P

where:

P

P

P

V

I

V

(sourcing current)

V

(sinking current)

The above addresses only steady state (dc) conditions. For

non-dc conditions the user must estimate power dissipation

based on rms value of the signal.

The task is one of determining the allowable on-chip power

dissipation for operation at a given ambient temperature and

power supply voltage. From this determination, one may

calculate the maximum allowable power dissipation and,

after subtracting P

current, which in turn can be used to determine the miniumum

load impedance that may safely be driven. The calculation is

summarized below.

P

TT

D(max)

J(max)

A

JA

=

−

θ

θ

Driving Capacitive Loads

Driving a capacitive load introduces phase-lag into the output

signal, and this in turn reduces op-amp system phase margin.

The application that is least forgiving of reduced phase

margin is a unity gain amplifier. The MIC7122 can typically

drive a 200pF capacitive load connected directly to the output

when configured as a unity-gain amplifier and powered with

a 2.2V supply. At 15V operation the circuit typically drives

500pF.

Using Large-Value Feedback Resistors

A large-value feedback resistor (> 500k

Ω) can reduce the

phase margin of a system. This occurs when the feedback

resistor acts in conjunction with input capacitance to create

phase lag in the feedback signal. Input capacitance is usually

a combination of input circuit components and other parasitic

capacitance, such as amplifier input capacitance and stray

printed circuit board capacitance.

Figure 2 illustrates a method of compensating phase lag

caused by using a large-value feedback resistor. Feedback

capacitor C

the phase lag caused by feedback resistor R

5.0V – 0.013V – 2.5V

2k

1.244mA

Ω

=

R

0.013V

0.001244A

.

Ω