CAP (Pin 7)

The CAP input is for external component connection for the PLL fil-

ter capacitor. (See Figure 5.)

SYNC (Pin 8).

The AC Line Frequency (50/60Hz) is applied to this input. The

Phase-Lock Loop synchronizes all internal timings to the AC signal

at the SYNC input. (See Figure 5.)

NOTE 1: ON will function as described if OFF is at logic 1.

If OFF is held at logic 0, the transitions at ON will

not cause the output to turn On.

NOTE 2: OFF will function as described if ON is at logic 1.

If ON is held at logic 0, the transitions at OFF

will not cause the the output to turn Off.

Tw

Tw

ø

FIGURE 2. OUTPUT CONDUCTION ANGLE, Ø

SYNC

TRIG

7339/40-032499-2

ON

OFF

Ø

OFF

OFF

OFF

159˚/STATE 1

159˚/STATE 1

159˚/STATE 1

OFF/STATE 0

FIGURE 3. PHASE ANGLE, Ø, vs ON AND OFF

DIGITAL

COMPARATOR

SYNC

PHASE-ANGLE

POINTER

PHASE-

LOCK

LOOP

CONTROL

LOGIC

BUF

BUF

BUF

SYNC

CAP

ON

OFF

FIGURE 4. LS7339/7340 BLOCK DIAGRAM

TRIG

OSC/TIMER

OSC

(+V)

(-V)

DRIVER

4

8

7

1

2

6

5

3

The information included herein is believed to be

accurate and reliable. However, LSI Computer Systems,

Inc. assumes no responsibilities for inaccuracies, nor for

any infringements of patent rights of others which may

result from its use.