UM0851 datasheet(31/245 Pages) STMICROELECTRONICS

31 / 245 page

UM0851

Platform section

Doc ID 16604 Rev 2

31/245

default:

printk("XXX: set_mode=Error!!!\n");

break;

}

static int clockevent_next_event(unsigned long cycles,

struct clock_event_device* clk_event_dev )

{

spear_timer_set_load_start(clk_event_tmr, 0, (u16)cycles);

return 0;

}

static void __init hrt_clockevent_init(void)

{

u32 tick_rate;

clk_event_tmr = spear_timer_request_specific(1);

BUG_ON(clk_event_tmr == NULL);

* program other parameters

* set clock source, program pre-scaler

clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,

clockevent_gpt.shift);

clockevent_gpt.max_delta_ns =

clockevent_delta2ns(0xffff, &clockevent_gpt);

clockevent_gpt.min_delta_ns =

clockevent_delta2ns(1, &clockevent_gpt);

clockevent_gpt.cpumask = cpumask_of_cpu(0);

clockevents_register_device(&clockevent_gpt);

spear_timer_irq.dev_id = (void *)clk_event_tmr;

setup_irq(spear_timer_get_irq(clk_event_tmr), &spear_timer_irq);

spear_timer_set_match(clk_event_tmr, 1);

}

Configuration options

As mentioned above, the GPT hardware clock can be obtained from two sources (the

system clock PLL1 and PLL3). The system clock, if selected, goes through a synthesizer

before reaching GPT. This synthesizer can be programmed to obtain the desired operating

frequency for GPT. By default it is divided by 2. For more details, please refer to the SPEAr

user manual.

References

●

Refer to linux-2.6.27/Documentation/timers/, for new time keeping and tick generation

architecture of Linux.

3.2

Vector interrupt controller (VIC) driver

This section describes the VIC driver.

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