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IMPLEMENTATION OF SIGMA-DELTA ADC WITH ST7FLITE05/09

;**********************************************************************

Rez_h

equ $80

; conversion result buffer H

Rez_l

equ $81

; conversion result buffer L

Loop_h

equ $82

; loop conversions counter H

Loop_l

equ $83

; loop conversions counter L

Adc_h

equ $84

; conversion result H

Adc_l

equ $85

; conversion result L

FLAGS0

equ $90

; binary variables

Nw_adc

equ 7

; new data from the conversion

m50us

equ 6

; marker 50us

;**********************************************************************

;Definitions of constants

;**********************************************************************

;port A

; destination of bits in port A

RS

equ 6

;**********************************************************************

;port B

; destination of bits in port B

Adc_in

equ 1

Dlt_out

equ 4

;**********************************************************************

;Processor initiation segment 'rom'

;**********************************************************************

INIT:

sim

rsp

ld a,$FFDE

ld RCCR,a

; oscillator frequency calibrator RC

ld a,#%01000000

; settings of ports

ld PADDR,a

ld a,#%01000000

ld PAOR,a

ld PADR,a

ld a,#%00010000

ld PBDDR,a

ld a,#%00010000

ld PBOR,a

ld PBDR,a

ld x,#$80

; All RAM clearing (80-FF)

loop_clrRAM:

clr (x)

inc x

jrne loop_clrRAM

ld a,#$0E

; initiation of an AT timer interrupt with

; the period of 50us