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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER

1 16-BIT TIMER PWM MODE

1.1 DESCRIPTION

In pulse width modulation mode, the frequency of the signal is determined by the value in

Output Compare 2 register (OC2R) and the pulse length by the value in the Output Compare

1 register (OCR1) or duty cycle value.

The OLVL2 bit selects the level to be applied to the output pin after a successful comparison

between the counter and the OC2R register and the OLVL1 bit selects the level to be applied

on the output after a successful comparison between the counter and the OC1R register

1.2 NORMAL BEHAVIOUR

Figure 1 shows the normal behaviour of output compare 1 (OCMP1) pin when a PWM signal

is output with OLVL2=1 and OLVL1=0.

Figure 1. PWM output when OLVL2=1 and OLVL1=0

When the counter reaches the OC2R register value, the value of OLVL2 is applied on the

OCMP1 pin (=1 in this case). When the counter reaches the value of the OC1R register, the

value of OLVL1 is applied on the OCMP1 pin (=0). The formulas needed to compute the

values to be put in OC2R and OC1R registers are in the 16-bit Timer chapter of the ST7 da-

tasheets. As the 16-bit Timer is reset at FFFC, the formulas are:

OCiR=((t*Fcpu)/presc)-5 where:

t= period of the signal

OCMP1

Ouput Compare pin

Timer output

FFFFh

OC1R

0000h

FFFCh

Ttimer × 65535

Tmax =

OLVL1=0

OLVL2= 1

FREE RUNNING

COUNTER VALUE

time

time

OC2R

OCMP1

Ouput Compare pin

Timer output

FFFFh

OC1R

0000h

FFFCh

Ttimer × 65535

Tmax =

OLVL1=0

OLVL2= 1

FREE RUNNING

COUNTER VALUE

time

time

OC2R

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