AN4496 datasheet(13/18 Pages) STMICROELECTRONICS

13 / 18 page

DocID026370 Rev 1

13/18

AN4496

Designing a high PF wide range LED driver with the HVLED815PF

2.2

Operating conditions

The first step is to verify:

Maximum power output [W]:

Equation 25

POUT = IOUT * VOUT  POUT_MAX

In the European range (VIN min > 175 V)





POUT max < 15 W

In the US and Japanese range (VIN min < 175 V)





POUT max < 10 W.

2.3

Transformer design

The voltage at the ILED pin must be limited at 1.5 V.

Then for the best performance the optimal reflected voltage VRopt must be set for using all

the dynamics of the ILED pin at minimum mains.

Equation 26

Where:

_VINmin = 80% 

efficiency at minimum input voltage

VILEDx = 1.5 V



pin ILED maximum voltage

2.4

Drain source breakdown

Reflected voltage can be limited by drain-source breakdown voltage.

Equation 27

VRbrk = V(BR)DSS - 2 * VINmax -VSpike - Vtol = 800 - 2 * 265 - 150 - 80 = 200 V

Where Vtol is a margin for the components tolerance.

The value of VR lower than VRopt and VRbrk is used to calculate the primary/secondary turns

ratio n:

Equation 28

Where VFsec = secondary diode forward drop voltage.

When VR is lower than VRopt, the dynamic is not optimized but the HVLED815PF device is

working without problem.

Real value used:

n = 4.52



VR = 100 V

AN4496 Folha de dados(PDF) 13 Page - STMicroelectronics

AN4496 Folha de dados(HTML) 13 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Folha de dados Download

Ligação URL