From the above equations, it is apparent that the gain

of the control-to-output function is strongly dependent

on the input voltage, despite the slight compensation

be considered at the maximum mains voltage, where

the gain is maximum and the loop bandwidth is maxi-

mum as well.

The feedback block is usually made up of a simple

resistor divider (see fig. 7). Only the upper resistor R7

is significant to the loop gain (the lower resistor R8

just sets the value of Vo). It is then convenient to as-

sume H=1 and to consider R7 as a part of the error

amplifier block G1(s).

Error Amplifier Compensation

In PFC preregulators that supply an electronic lamp ballast the error amplifier is compensated typically

as shown in fig. 7 (see also Ref. [2] and [3]).

For this kind of load this circuit gives satisfactory results. It may not be acceptable, however, in other

systems where stability must be ensured over a wide range of input voltage and load current, and does

not work at all when the PFC preregulator supplies a switching converter.

Figure 8 shows the suggested compensation schemes for both the cases under consideration.

With a resistive load the loop can be stabilised by adding a pole in the origin plus a low frequency zero

that compensates the pole of the control-to-output gain (network a). Ideally, this can give the desired

bandwidth with 90° phase margin as well as high DC gain for good load regulation.

With a constant power load the control-to-output gain has a pole in the origin thus the DC gain of the er-

ror amplifier should be externally limited with a feedback resistor. If not, a second pole in the origin

would be introduced, which would result in a system whose stability might be critical.

Limiting the gain goes to the detriment of preregulator’s load regulation but this has not a serious impact

on the overall system since the downstream converter will easily compensate for that.

The compensation network (b) adds a pole-zero couple that both makes the gain roll off at low frequency

(so as to cross the 0 dB axis at low frequency) and boosts the phase in the neighborhood of the cross-

over frequency (so as to increase phase margin).

The transfer functions of the compensation networks of fig. 8 a) and b) are respectively:

G1

(s) =

=











1

+ s ⋅ C3 ⋅ R11

s

⋅ C3 ⋅ R7

(circuit a − resistive load)

R12

R7

⋅

1

+ s ⋅ C3 ⋅ R11

1

+ s ⋅ C3 ⋅ (R11 + R12)

(circuit b − constant power load)

INV

2.5V

E/A

+

_

L6561

C3

R7

TO MULTIPLIER

2

1

R8

Vo

Figure 7. Typical compensation scheme in

PFC preregulators for lamp ballast

COMP

INV

2.5V

E/A

+

_

L6561

C3

R12

R7

TO MULTIPLIER

R11

2

1

R8

Vo

COMP

INV

2.5V

E/A

+

_

L6561

C3

R7

TO MULTIPLIER

R11

2

1

R8

Vo

a) resistive load

b) constant power load

Figure 8. Suggested compensation networks for TM boost PFC

AN1089 APPLICATION NOTE

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