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UPD17708 Folha de dados(PDF) 61 Page - NEC

Nome de Peças UPD17708
Descrição Electrónicos  4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM
PDF  356 Pages
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UPD17708 Folha de dados(HTML) 61 Page - NEC

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µPD17704, 17705, 17707, 17708, 17709
Table 7-2. Modification of Data Memory Address and Indirect Transfer Address by Index
Register and Data Memory Row Address Pointer
BANK
: bank register
IX
: index register
IXE
: index enable flag
IXH
: bits 10 through 8 of index register
IXM
: bits 7 through 4 of index register
IXL
: bits 3 through 0 of index register
m
: data memory address indicated by mR, mC
mR
: data memory row address (high-order)
mC
: data memory column address (low-order)
MP
: data memory row address pointer
MPE : memory pointer enable flag
r
: general register column address
RP
: general register pointer
(X)
: contents addressed by X
X: direct address such as “m” and “r”
b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b2 b1 b0 b3 b2 b1 b0
General Register Address Specified by “r”
Data Memory Address Specified by “m”
Indirect Transfer Address Specified by “@r”
Bank
Row
address
Column
address
Bank
Row
address
Column
address
Bank
Row
address
Column
address
RP
r
BANK
m
BANK
mR
(r)
ditto
MP
(r)
ditto
BANK
m
BANK
mR
IX
(r)
OR
MP
(r)
ditto
ditto
ditto
MPE
0
1
0
1
IXE
0
0
1
1
IXH, IXM
Logical
OR
Logical



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