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UPD17708 Folha de dados(PDF) 308 Page - NEC

Nome de Peças UPD17708
Descrição Electrónicos  4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM
PDF  356 Pages
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UPD17708 Folha de dados(HTML) 308 Page - NEC

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The operation of CE reset differs depending on whether the clock stop instruction is used or not.
This difference is described in 21.2.1 and 21.2.2 below.
21.2.3 describes the points to be noted when CE reset is effected.
21.2.1 CE reset without clock stop (STOP s) instruction
Figure 21-2 shows the operation.
When the CE pin has gone high, the CE reset timer carry counter starts counting at the rising edge of the basic
timer 0 carry FF setting pulse.
Figure 21-3. CE Reset Operation without Clock Stop Instruction (1/2)
(a) Normal operation
•
When “N” is set to CE reset timer carry counter
•
When “1” is set to CE reset timer carry counter
VDD
CE
XOUT
BTM0CY flag
setting pulse
CE reset timer
carry counter
Set value of CE reset timer
carry counter
CE reset signal
5 V
0 V
H
L
H
L
H
L
H
L
H
H
L
L
tSET
0
1
2
3
N–2
N–1
N
0
N
CE reset
VDD
CE
XOUT
BTM0CY flag
setting pulse
CE reset timer
carry counter
Set value of CE reset
timer carry counter
CE reset signal
CE reset
5 V
0 V
H
L
H
L
H
L
H
L
H
H
L
L
tSET
01
0
1



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