AD9786_15 datasheet(21/56 Pages) AD

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AD9786

Rev. B | Page 21 of 56

MSB/LSB TRANSFERS

The AD9786 serial port can support both MSB-first or LSB-first

data formats. This functionality is controlled by register address

DATADIR (0x00[6]). The default is MSB first. When this bit is

set active high, the AD9786 serial port is in LSB-first format.

That is, if the AD9786 is in LSB-first mode, the instruction byte

must be written from least significant bit to most significant bit.

Multibyte data transfers in MSB-first format can be completed

by writing an instruction byte that includes the register address

of the most significant byte. In MSB-first mode, the serial port

internal byte address generator decrements for each byte

required of the multibyte communication cycle. Multibyte data

transfers in LSB-first format can be completed by writing an

instruction byte that includes the register address of the least

significant byte. In LSB-first mode, the serial port internal byte

address generator increments for each byte required of the

multibyte communication cycle.

The AD9786 serial port controller address increments from 0x1F

to 0x00 for multibyte I/O operations if the MSB-first mode is

active. The serial port controller address decrements from 0x00 to

0x1F for multibyte I/O operations if the LSB-first mode is active.

NOTES ON SERIAL PORT OPERATION

The AD9786 serial port configuration bits reside in Bit 6 and

Bit 7 of Register Address 0x00. Note that the configuration

changes immediately upon writing to the last bit of the register.

For multibyte transfers, writing to this register might occur

during the middle of a communication cycle. Care must be

taken to compensate for this new configuration for the

remaining bytes of the current communication cycle.

The same considerations apply to setting the software reset

SWRST (0x00[5]) bit. All other registers are set to their default

values, but the software reset does not affect the bits in Register

Address 0x00 and Register Address 0x04.

It is recommended to use only single-byte transfers when

changing serial port configurations or initiating a software

reset.

R/W N1

A4 A3

D7 D6N D5N

D00

D10

D20

D30

D7 D6N D5N

D00

D10

D20

D30

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

CSB

SCLK

SDIO

SDO

Figure 37. Serial Register Interface Timing MSB First

A3 A4

N1 R/W D00 D10 D20

D7N

D6N

D5N

D4N

D00 D10 D20

D7N

D6N

D5N

D4N

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

CSB

SCLK

SDIO

SDO

Figure 38. Serial Register Interface Timing LSB First

INSTRUCTION BIT 6

INSTRUCTION BIT 7

CSB

SCLK

SDIO

tDS

tDH

tPWH

tPWL

tSCLK

Figure 39. Timing Diagram for Register Write

DATA BIT n–1

DATA BIT n

CSB

SCLK

SDIO

SDO

tDV

Figure 40. Timing Diagram for Register Read

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