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IDT7132LA55L48B Folha de dados(PDF) 4 Page - Integrated Device Technology

Nome de Peças IDT7132LA55L48B
Descrição Electrónicos  HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
PDF  11 Pages
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Fabricante Electrônico  IDT [Integrated Device Technology]
Página de início  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT7132LA55L48B Folha de dados(HTML) 4 Page - Integrated Device Technology

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IDT7132SA/LA AND IDT7142SA/LA
HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.02
4
5V
1250
Ω
30pF*
775
Ω
DATA OUT
5V
1250
Ω
775
Ω
5pF*
DATA OUT
2692 drw 06
100pF for 55 and 100ns versions
270
Ω
30pF*
BUSY or INT
100pF for 55 and 100ns versions
5V
DATA RETENTION WAVEFORM
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
2692 tbl 07
GND TO 3.0V
5ns
1.5V
1.5V
Figures 1, 2, and 3
DATA RETENTION CHARACTERISTICS (LA Version Only)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDR
VCC for Data Retention
2.0
—
—
V
ICCDR
Data Retention Current
VCC = 2.0V,
CE ≥ VCC -0.2V
Mil.
—
100
4000
µA
VIN
≥ VCC -0.2V or VIN ≤ 0.2V Com’l.
—
100
1500
µA
tCDR
Chip Deselect to Data
0
—
—
ns
Retention Time
tR
Operation Recovery
tRC
——
ns
Time
(3)
(3)
(2)
lDT7132LA/IDT7142LA
Figure 2. Output Test Load
(for tHZ, tLZ, tWZ, and tOW)
* Including scope and jig
Figure 1. AC Output Test Load
2692 tbl 06
NOTES:
1. VCC = 2V, TA = +25
°C, and is not production tested.
2. tRC = Read Cycle Time
3. This parameter is guaranteed but not production tested.
VCC
CE
4.5V
4.5V
DATA RETENTION MODE
tCDR
tR
VIH
VIH
VDR
VDR 2.0V
2692 drw 05
≥
Figure 3.
BUSY
BUSY
BUSY
BUSY
BUSY and INT
INT
INT
INT
INT
AC Output Test Load



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