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GMS81032 Folha de dados(PDF) 39 Page - Hynix Semiconductor |
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GMS81032 Folha de dados(HTML) 39 Page - Hynix Semiconductor |
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39 / 101 page ![]() 4 - 1 Chapter 4. Peripheral Hardware CHAPTER 4. PERIPHERAL HARDWARE 4.1 CLOCK GENERATING CIRCUIT Clock generating circuit consists of Clock Pulse Generator(C.P.G), Prescaler, Basic Interval Timer(B.I.T) and Watch Dog Timer. The clock applied to the Xin pin divided by two is used as the internal system clock. Fig. 4.1 Block diagram of clock generating circuit PRESCALER C.P.G MUX WDT (6) COMPARATOR Internal Data Bus 0 1 2 3 4 0 5 6 6 WDTON To Reset Circuit IFWDT WDTCL IFBIT 5 0 7 0 fcpu fex PS1 ENPCK Peripheral CKCTLR BTCL 3 8 OSC Circuit B.I.T (8) 6 WDTR Internal System Clock 5 |
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