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DP83849CVS/NOPB Folha de dados(PDF) 79 Page - Texas Instruments

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Nome de Peças DP83849CVS/NOPB
Descrição Electrónicos  PHYTER DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver
PDF  101 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

DP83849CVS/NOPB Folha de dados(HTML) 79 Page - Texas Instruments

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78
8.2 AC Specs
8.2.1 Power Up Timing
Note: In RMII Mode, the minimum Post Power up Stabilization and Hardware Configuration Latch-in times are 84ms.
Parameter
Description
Notes
Min
Typ
Max
Units
T2.1.1
Post Power Up Stabilization
time prior to MDC preamble for
register accesses
MDIO is pulled high for 32-bit serial man-
agement initialization
X1 Clock must be stable for a min. of
167ms at power up.
167
ms
T2.1.2
Hardware Configuration Latch-
in Time from power up
Hardware Configuration Pins are de-
scribed in the Pin Description section
X1 Clock must be stable for a min. of
167ms at power up.
167
ms
T2.1.3
Hardware Configuration pins
transition to output drivers
50
ns
Vcc
Hardware
RESET_N
MDC
32 clocks
Latch-In of Hardware
Configuration Pins
Dual Function Pins
Become Enabled As Outputs
input
output
T2.1.3
T2.1.2
T2.1.1
X1 clock



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