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EP5358LUI Folha de dados(PDF) 14 Page - Altera Corporation |
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EP5358LUI Folha de dados(HTML) 14 Page - Altera Corporation |
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14 / 16 page  EP5358LUI/EP5358HUI Layout Recommendation Figure 10 shows critical components and layer 1 traces of a recommended minimum footprint EP5358LQI/EP5358HQI layout with ENABLE tied to VIN. Alternate ENABLE configurations, and other small signal pins need to be connected and routed according to specific customer application. Please see the Gerber files on the Altera website www.altera.com/enpirion for exact dimensions and other layers. Please refer to Figure 10 while reading the layout recommendations in this section. Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as close to the EP5358QI package as possible. They should be connected to the device with very short and wide traces. Do not use thermal reliefs or spokes when connecting the capacitor pads to the respective nodes. The +V and GND traces between the capacitors and the EP5358QI should be as close to each other as possible so that the gap between the two nodes is minimized, even under the capacitors. Recommendation 2: Input and output grounds are separated until they connect at the PGND pins. The separation shown on Figure 10 between the input and output GND circuits helps minimize noise coupling between the converter input and output switching loops. Recommendation 3: The system ground plane should be the first layer immediately below the surface layer. This ground plane should be continuous and un-interrupted below the converter and the input/output capacitors. Please see the Gerber files on the Altera website www.altera.com/enpirion. Figure 10:Top PCB Layer Critical Components and Copper for Minimum Footprint Recommendation 4: Multiple small vias should be used to connect the ground traces under the device to the system ground plane on another layer for heat dissipation. The drill diameter of the vias should be 0.33mm, and the vias must have at least 1 oz. copper plating on the inside wall, making the finished hole size around 0.20-0.26mm. Do not use thermal reliefs or spokes to connect the vias to the ground plane. It is preferred to put these vias under the capacitors along the edge of the GND copper closest to the +V copper. Please see Figure 10. These vias connect the input/output filter capacitors to the GND plane and help reduce parasitic inductances in the input and output current loops. If the vias cannot be placed under CIN and COUT, then put them just outside the capacitors along the GND. Do not use thermal reliefs or spokes to connect these vias to the ground plane. Recommendation 5: AVIN is the power supply for the internal small-signal control circuits. It should be connected to the input voltage at a quiet point. In Figure 10 this connection is made at the input capacitor close to the VIN connection. www.altera.com/enpirion Page 14 03541 October 11, 2013 Rev F |
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