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READ/WRITE TIMING DIAGRAM Figure 10 (cont’d)

Write-zero Time Slot

Read-data Time Slot

NOTE:

For read-data time slots the optimal sampling point for the master is as close as possible to the end time

a read-one time slot, this maximizes the amount of time for the pull-up resistor to recover the line to a

high level. For a read-zero time slot it ensures that a read will occur before the fastest 1-Wire device