AX2000 datasheet(84/262 Pages) MICROSEMI

Nome de Peças	AX2000

Descrição Electrónicos	Axcelerator Family FPGAs

PDF	262 Pages

Scroll/Zoom	100%

Fabricante Electrônico	MICROSEMI [Microsemi Corporation]

Página de início	http://www.microsemi.com

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84 / 262 page

Detailed Specifications

2- 70

R e v i sio n 1 8

Global Resource Distribution

At the root of each global resource is a PLL. There are two groups of four PLLs for every device. One

group, located at the center of the north edge (in the I/O ring) of the chip, sources the four HCLKs. The

second group, located at the center of the south edge (again in the I/O ring), sources the four CLKs

(Figure 2-38).

Regardless of the type of global resource, HCLK or CLK, each of the eight resources reach the

ClockTileDist (CTD) Cluster located at the center of every core tile with zero skew. From the

ClockTileDist Cluster, all four HCLKs and four CLKs are distributed through the core tile (Figure 2-39).

Figure 2-38 • PLL Group

Figure 2-39 • Example of HCLK and CLK Distributions on the AX2000

PLL Cluster

P N

HCLKA HCLKB HCLKC HCLKD

CLKE

PLL

CLKF

CLKG

CLKH

PLL

PLL Group

HCLK

CLK

PLL Group

ClockTileDist Cluster

AX2000 Folha de dados(PDF) 84 Page - Microsemi Corporation