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ADS5520IPAP Folha de dados(PDF) 29 Page - Texas Instruments

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Nome de Peças ADS5520IPAP
Descrição Electrónicos  12-Bit, 125 MSPS Analog-To-Digital Converter
PDF  38 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

ADS5520IPAP Folha de dados(HTML) 29 Page - Texas Instruments

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ADS5520
www.ti.com....................................................................................................................................................... SBAS310F – MAY 2004 – REVISED OCTOBER 2008
To use the input clock as the data capture clock, it is necessary to delay the input clock by a delay, td, that
results in the desired setup or hold time. Use either of the following equations to calculate the value of td.
Desired setup time = td – tSTART
Desired hold time = tEND – td
Table 6. Timing Characteristics at Additional Sampling Frequencies (DLL ON)
Data Rise time tr
Data Fall time tf
tSETUP (ns)
tHOLD (ns)
tSTART (ns)
tEND (ns)
fS
(ns)
(ns)
(MSPS)
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
105
2.4
3.1
2.2
2.6
1.7
2.6
5.8
7.3
4.4
5.1
3.3
3.8
80
3.3
4.1
3
3.4
0.3
1.5
5.3
8
5.8
6.6
4.4
5.3
65
4.1
5
3.7
4.2
-0.8
0.4
5.3
8.7
6.7
7.2
5.5
6.4
Table 7. Timing Characteristics at Additional Sampling Frequencies (DLL OFF)
Data Rise time tr
Data Fall time tf
tSETUP (ns)
tHOLD (ns)
tSTART (ns)
tEND (ns)
fS
(ns)
(ns)
(MSPS)
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
80
3.6
4.7
1.8
3.1
3.3
4.7
8.2
11.1
5.6
6.1
4.4
5.1
65
4.7
6
2.1
3.1
2.4
4.2
8.3
12
6.6
7.2
5.5
6.4
40
8.5
11
2.8
3.5
-1
1.5
8.9
14.5
7.5
8
7.3
7.8
20
17
25.7
2.5
4.7
-9.8
2
9.5
21.6
7.5
8
7.6
8
10
27
51
4
6.5
-30
-3
11.5
31
2
284
370
4
13
185
320
515
576
50
82
75
150
Table 8. Timing Characteristics at Additional Sampling Frequencies (DLL ON)
CLKOUT Jitter,
CLKOUT Rise Time
CLKOUT Fall Time
Input-to-Output Clock Delay
Peak-to-Peak
fS
tr (ns)
tf (ns)
tPDI (ns)
tJIT (ps)
(MSPS)
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
105
2
2.2
1.7
1.8
175
250
4
4.7
5.5
80
2.5
2.8
2.1
2.3
210
315
3.7
4.3
5.1
65
3.1
3.5
2.6
2.9
260
380
3.5
4.1
4.8
Table 9. Timing Characteristics at Additional Sampling Frequencies (DLL OFF)
CLKOUT Jitter,
CLKOUT Rise Time
CLKOUT Fall Time
Input-to-Output Clock Delay
Peak-to-Peak
fS
tr (ns)
tf (ns)
tPDI (ns)
tJIT (ps)
(MSPS)
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
80
2.5
2.8
2.1
2.3
210
315
7.1
8
8.9
65
3.1
3.5
2.6
2.9
260
380
7.8
8.5
9.4
40
4.8
5.3
4
4.4
445
650
9.5
10.4
11.4
20
8.3
9.5
7.6
8.2
800
1200
13
15.5
18
10
16
20.7
25.5
2
31
52
36
65
2610
4400
537
551
567
Copyright © 2004–2008, Texas Instruments Incorporated
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