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LTC3602 Folha de dados(PDF) 6 Page - Linear Technology |
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LTC3602 Folha de dados(HTML) 6 Page - Linear Technology |
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6 / 20 page ![]() LTC3602 6 3602fb BLOCK DIAGRAM PIN FUNCTIONS SYNC/MODE (Pin 1/Pin 4): Mode Select and External Clock Synchronization Input. PGOOD (Pin 2/Pin 5): Power Good Output. Open-drain logic output that is pulled to ground when the output volt- age is not within ±10% of regulation point. RT (Pin 3/Pin 6): Frequency Set Pin. ITH (Pin 4/Pin 7): Error Amplifier Compensation Point. VFB (Pin 5/Pin 8): Feedback Pin. SGND (Pin 17/Pin 9, Pin 21): Signal Ground. RUN (Pin 6/Pin 10): Run Control Input. This pin may be tied to PVIN to enable the chip. TRACK/SS (Pin 7/Pin 11): Tracking Input for the Controller or Optional External Soft-Start Input. This pin allows the start-up of VOUT to “track” the external voltage at this pin using an external resistor divider. An external soft-start can be programmed by connecting a capacitor between this pin and ground. Leave this pin floating to use the internal 1ms soft-start clamp. Do not tie this pin to INTVCC or to PVIN. PGND (Pins 8, 9, 10/Pins 12, 13, 14, 15): Power Ground. SW (Pins 11, 12, 13/Pins 16, 17, 18, 19): Switch Node Connection to the Inductor. BOOST (Pin 14/Pin 20): Bootstrapped Supply to the Top Side Floating Gate Driver. PVIN (Pin 15/Pins 1,2): Power Input Supply. Decouple this pin with a capacitor to PGND INTVCC (Pin 16/Pin 3): Output of Internal 5V LDO. Exposed Pad (Pin 17/Pin 21): SGND. Exposed pad is signal ground and must be soldered to the PCB. RUN RT SYNC/MODE BOOST ITH INTVCC PVIN 3602 BD LDO SW SW PGND PGND PGOOD VFB TRACK/SS LOGIC SLOPE COMPENSATION RECOVERY VOLTAGE REFERENCE 1ms SOFT-START OSILLATOR SLOPE COMPENSATION PGND SW – + + + – + – + – + – + – + – + + – 1μA 0.6V 0.54V 0.66V ERROR AMPLIFIER BURST COMPARATOR OVER-CURRENT COMPARATOR REVERSE COMPARATOR MAIN I-COMPARATOR BCLAMP SYNC/MODE FE/UF Package |
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