PIC12F508ESLASHMS datasheet(55/110 Pages) MICROCHIP

55 / 110 page

DS41236E-page 55

PIC12F508/509/16F505

7.9

Power-down Mode (Sleep)

A device may be powered down (Sleep) and later

powered up (wake-up from Sleep).

7.9.1

SLEEP

The Power-Down mode is entered by executing a

SLEEP

instruction.

If enabled, the Watchdog Timer will be cleared but

keeps running, the TO bit (STATUS<4>) is set, the PD

bit (STATUS<3>) is cleared and the oscillator driver is

turned off. The I/O ports maintain the status they had

before the SLEEP instruction was executed (driving

high, driving low or high-impedance).

For lowest current consumption while powered down,

the T0CKI input should be at VDD or VSS and the

(GP3/RB3)/MCLR/VPP pin must be at a logic high

level if MCLR is enabled.

7.9.2

WAKE-UP FROM SLEEP

The device can wake-up from Sleep through one of

the following events:

An external Reset input on (GP3/RB3)/MCLR/

VPP pin, when configured as MCLR.

A Watchdog Timer time-out Reset (if WDT was

enabled).

A change on input pin GP0/RB0, GP1/RB1,

GP3/RB3 or RB4 when wake-up on change is

enabled.

These events cause a device Reset. The TO, PD and

GPWUF/RBWUF bits can be used to determine the

cause of device Reset. The TO bit is cleared if a WDT

time-out occurred (and caused wake-up). The PD bit,

which is set on power-up, is cleared when SLEEP is

invoked. The GPWUF/RBWUF bit indicates a change

in state while in Sleep at pins GP0/RB0, GP1/RB1,

GP3/RB3 or RB4 (since the last file or bit operation on

GP/RB port).

The WDT is cleared when the device wakes from

Sleep, regardless of the wake-up source.

7.10

Program Verification/Code

Protection

If the code protection bit has not been programmed, the

on-chip program memory can be read out for

verification purposes.

The first 64 locations and the last location (OSCCAL)

can be read, regardless of the code protection bit

setting.

The last memory location can be read regardless of the

code protection bit setting on the PIC12F508/509/

16F505 devices.

7.11

ID Locations

Four memory locations are designated as ID locations

where the user can store checksum or other code

identification

numbers.

These

locations

are

not

accessible during normal execution, but are readable

and writable during Program/Verify.

Use only the lower 4 bits of the ID locations and always

program the upper 8 bits as ‘0’s.

7.12

In-Circuit Serial Programming™

The PIC12F508/509/16F505 microcontrollers can be

serially programmed while in the end application circuit.

This is simply done with two lines for clock and data,

and three other lines for power, ground and the

programming voltage. This allows customers to manu-

facture boards with unprogrammed devices and then

program the microcontroller just before shipping the

product. This also allows the most recent firmware, or

a custom firmware, to be programmed.

The devices are placed into a Program/Verify mode by

holding the GP1/RB1 and GP0/RB0 pins low while

raising the MCLR (VPP) pin from VIL to VIHH (see

programming specification). GP1/RB1 becomes the

programming clock and GP0/RB0 becomes the

programming data. Both GP1/RB1 and GP0/RB0 are

Schmitt Trigger inputs in this mode.

After Reset, a 6-bit command is then supplied to the

device. Depending on the command, 14 bits of program

data are then supplied to or from the device, depending

if the command was a Load or a Read. For complete

details of serial programming, please refer to the

PIC12F508/509/16F505 Programming Specifications.

A typical In-Circuit Serial Programming connection is

shown in Figure 7-15.

Note:

A Reset generated by a WDT time-out

does not drive the MCLR pin low.

Note:

Caution: Right before entering Sleep,

read the input pins. When in Sleep, wake-

up occurs when the values at the pins

change from the state they were in at the

last reading. If a wake-up on change

occurs and the pins are not read before re-

entering Sleep, a wake-up will occur

immediately even if no pins change while

in Sleep mode.

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