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FLF3215T-R47N Folha de dados(PDF) 12 Page - Micrel Semiconductor |
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FLF3215T-R47N Folha de dados(HTML) 12 Page - Micrel Semiconductor |
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12 / 19 page ![]() Micrel, Inc. MIC23163/4 July 29, 2013 12 Revision 2.0 Functional Description VIN The input supply (VIN) provides power to the internal MOSFETs for the switch-mode regulator along with the internal control circuitry. The VIN operating range is 2.7V to 5.5V so an input capacitor, with a minimum voltage rating of 6.3V, is recommended. Due to the high switching speed, a minimum 2.2µF bypass capacitor placed close to VIN and the power ground (PGND) pin is required. Refer to the “PCB Layout Recommendations” section for details. EN/Shutdown A logic high signal on the enable pin activates the output voltage of the device. A logic low signal on the enable pin deactivates the output and reduces supply current to 0.1µA. When disabled the MIC23164 switches an internal load of 180 Ω on the regulators switch node to discharge the output. The MIC23163/4 features external soft-start circuitry via the soft start (SS) pin that reduces in-rush current and prevents the output voltage from overshooting at start up. Do not leave the EN pin floating. SW The switch (SW) connects directly to one end of the inductor and provides the current path during switching cycles. The other end of the inductor is connected to the load, SNS pin and output capacitor. Due to the high- speed switching on this pin, the switch node should be routed away from sensitive nodes whenever possible. AGND The analog ground (AGND) is the ground path for the biasing and control circuitry. The current loop for the signal ground should be separate from the power ground (PGND) loop. Refer to the “PCB Layout Recommendations” section for details. PGND The power ground pin is the ground path for the high current in PWM mode. The current loop for the power ground should be as small as possible and separate from the analog ground (AGND) loop as applicable. Refer to the “PCB Layout Recommendations” section for details. PG The power good (PG) pin is an open drain output which indicates logic high when the output voltage is typically above 90% of its steady state voltage. A pull-up resistor of more than 5k Ω should be connected from PG to V OUT. SS The soft start (SS) pin is used to control the output voltage ramp up time. The approximate equation for the ramp time in seconds is 270 × 10 3 × ln(10) × C SS. For example, for a CSS = 1nF, TRISE ~ 600µs. The minimum recommended value for CSS is 1nF. FB The feedback (FB) pin is provided for the adjustable voltage option (no internal connection for fixed options). This is the control input for programming the output voltage. A resistor divider network is connected to this pin from the output and is compared to the internal 0.7V reference within the regulation loop. The output voltage can be programmed between 0.7V and VIN using Equation 1: + × = R2 R1 1 V V REF OUT Eq. 1 where: R1 is the top resistor, R2 is the bottom resistor. Table 1. Example Feedback Resistor Values VOUT R1 R2 1.2V 215k 301k 1.5V 301k 261k 1.8V 340k 215k 2.5V 274k 107k 3.3V 383k 102k 3.6V 422k 102k |
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