DSPIC33FJMC302ESS datasheet(65/330 Pages) MICROCHIP

65 / 330 page

DS70283K-page 65

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

6.3

System Reset

The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

family of devices have two types of Reset:

• Cold Reset

• Warm Reset

A cold Reset is the result of a Power-on Reset (POR)

or a Brown-out Reset (BOR). On a cold Reset, the

FNOSC configuration bits in the FOSC device

configuration register selects the device clock source.

A warm Reset is the result of all other reset sources,

including the RESET instruction. On warm Reset, the

device will continue to operate from the current clock

source as indicated by the Current Oscillator Selection

bits (COSC<2:0>) in the Oscillator Control register

(OSCCON<14:12>).

The device is kept in a Reset state until the system

power supplies have stabilized at appropriate levels

and the oscillator clock is ready. The sequence in

which this occurs is shown in Figure 6-2.

TABLE 6-1:

OSCILLATOR PARAMETERS

Oscillator Mode

Oscillator

Start-up Delay

Oscillator Start-up

Timer

PLL Lock Time

Total Delay

FRC, FRCDIV16,

FRCDIVN

TOSCD

——

TOSCD

FRCPLL

TOSCD

—TLOCK

TOSCD + TLOCK

TOSCD

TOST

—TOSCD + TOST

TOSCD

TOST

—TOSCD + TOST

——

XTPLL

TOSCD

TOST

TLOCK

TOSCD + TOST + TLOCK

HSPLL

TOSCD

TOST

TLOCK

TOSCD + TOST + TLOCK

ECPLL

—

TLOCK

SOSC

TOSCD

TOST

—TOSCD + TOST

LPRC

TOSCD

——

TOSCD

Note 1: TOSCD = Oscillator Start-up Delay (1.1

μs max for FRC, 70 μs max for LPRC). Crystal Oscillator start-up

times vary with crystal characteristics, load capacitance, etc.

2: TOST = Oscillator Start-up Timer Delay (1024 oscillator clock period). For example, TOST = 102.4

μs for a

10 MHz crystal and TOST = 32 ms for a 32 kHz crystal.

3: TLOCK = PLL lock time (1.5 ms nominal), if PLL is enabled.

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