PIC16F883-ESLASHSO. datasheet(208/338 Pages) MICROCHIP

208 / 338 page

PIC16F882/883/884/886/887

DS41291G-page 208

 2006-2012 Microchip Technology Inc.

13.4.16.1

Bus Collision During a Start

Condition

During a Start condition, a bus collision occurs if:

SDA or SCL are sampled low at the beginning of

the Start condition (Figure 13-21).

SCL is sampled low before SDA is asserted low

(Figure 13-22).

During a Start condition, both the SDA and the SCL

pins are monitored, if:

the SDA pin is already low,

or the SCL pin is already low,

then:

the Start condition is aborted,

and the BCLIF flag is set,

and the MSSP module is reset to its Idle state

(Figure 13-21).

The Start condition begins with the SDA and SCL pins

de-asserted. When the SDA pin is sampled high, the

Baud Rate Generator is loaded from SSPADD<6:0>

and counts down to 0. If the SCL pin is sampled low

while SDA is high, a bus collision occurs, because it is

assumed that another master is attempting to drive a

data ‘1’ during the Start condition.

If the SDA pin is sampled low during this count, the

BRG is reset and the SDA line is asserted early

(Figure 13-23). If, however, a ‘1’ is sampled on the SDA

pin, the SDA pin is asserted low at the end of the BRG

count. The Baud Rate Generator is then reloaded and

counts down to 0, and during this time, if the SCL pin is

sampled as ‘0’, a bus collision does not occur. At the

end of the BRG count, the SCL pin is asserted low.

FIGURE 13-21:

BUS COLLISION DURING START CONDITION (SDA ONLY)

Note:

The reason that bus collision is not a factor

during a Start condition, is that no two bus

masters can assert a Start condition at the

exact same time. Therefore, one master

will always assert SDA before the other.

This condition does not cause a bus colli-

sion, because the two masters must be

allowed to arbitrate the first address fol-

lowing the Start condition. If the address is

the same, arbitration must be allowed to

continue into the data portion, Repeated

Start or Stop conditions.

SDA

SCL

SEN

SDA sampled low before

SDA goes low before the SEN bit is set.

S bit and SSPIF set because

SSP module reset into Idle state.

SEN cleared automatically because of bus collision.

S bit and SSPIF set because

Set SEN, enable Start

condition if SDA = 1, SCL = 1.

SDA = 0, SCL = 1.

BCLIF

SSPIF

SDA = 0, SCL = 1.

SSPIF and BCLIF are

cleared in software.

SSPIF and BCLIF are

cleared in software.

Set BCLIF,

Start condition. Set BCLIF.

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